KR100646468B1 - 반도체패키지 - Google Patents
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- KR100646468B1 KR100646468B1 KR1020000054973A KR20000054973A KR100646468B1 KR 100646468 B1 KR100646468 B1 KR 100646468B1 KR 1020000054973 A KR1020000054973 A KR 1020000054973A KR 20000054973 A KR20000054973 A KR 20000054973A KR 100646468 B1 KR100646468 B1 KR 100646468B1
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- semiconductor chip
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- conductive wire
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H01L2224/85207—Thermosonic bonding
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/181—Encapsulation
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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Abstract
Description
Claims (4)
- 삭제
- 제1면과 이것의 반대면인 제2면을 갖고, 상기 제2면에는 다수의 입출력패드가 형성된 제1반도체칩과, 제1면과 이것의 반대면인 제2면을 갖고, 상기 제2면에는 다수의 입출력패드가 형성되며, 상기 제1면이 상기 제1반도체칩의 제2면과 마주하여 위치된 제2반도체칩과, 상기 제1반도체칩의 제1면에 접착되고, 상기 제1반도체칩 및 제2반도체칩의 입출력패드와 도전성 와이어로 접속되며, 마더보드에 실장되는 섭스트레이트와, 상기 제1반도체칩의 제2면과 상기 제2반도체칩의 제1면 사이에 개재(介在)되어 접착되고, 두께는 상기 제1반도체칩의 입출력패드에 연결된 도전성 와이어의 루프 하이트보다 두껍게 형성된 완충수단과, 상기 제1반도체칩, 제2반도체칩, 도전성 와이어 및 섭스트레이트의 일면을 봉지하는 봉지재를 포함하고,상기 완충수단은 평면상 격자 모양의 접착기둥이며, 상기 접착기둥 내측의 제1반도체칩과 제2반도체칩 사이의 공간에는 에폭시가 접착되고, 상기 섭스트레이트는 평면인 제1면과 이것의 반대면인 제2면이 구비되고, 상기 제1면과 제2면 사이에는 또다른 제3면이 형성되며, 상기 제3면에 상기 제1반도체칩의 제1면이 접착된 것을 특징으로 하는 반도체패키지.
- 삭제
- 삭제
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020000054973A KR100646468B1 (ko) | 2000-09-19 | 2000-09-19 | 반도체패키지 |
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KR1020000054973A KR100646468B1 (ko) | 2000-09-19 | 2000-09-19 | 반도체패키지 |
Publications (2)
Publication Number | Publication Date |
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KR20020022268A KR20020022268A (ko) | 2002-03-27 |
KR100646468B1 true KR100646468B1 (ko) | 2006-11-14 |
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KR1020000054973A KR100646468B1 (ko) | 2000-09-19 | 2000-09-19 | 반도체패키지 |
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Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI242852B (en) | 2004-05-05 | 2005-11-01 | Orient Semiconductor Elect Ltd | Semiconductor package |
CN100505250C (zh) * | 2004-05-18 | 2009-06-24 | 华泰电子股份有限公司 | 半导体封装装置 |
KR101694443B1 (ko) | 2015-04-22 | 2017-01-10 | 주식회사 포스코 | 에어나이프 클리닝 장치 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5323060A (en) * | 1993-06-02 | 1994-06-21 | Micron Semiconductor, Inc. | Multichip module having a stacked chip arrangement |
JPH1070232A (ja) * | 1996-07-26 | 1998-03-10 | Honeywell Inc | チップ・スタックおよびコンデンサ取付の配置 |
KR19990069439A (ko) * | 1998-02-09 | 1999-09-06 | 김영환 | 스택 칩 패키지 |
JP2000058743A (ja) * | 1998-07-31 | 2000-02-25 | Sanyo Electric Co Ltd | 半導体装置 |
KR20000061035A (ko) * | 1999-03-23 | 2000-10-16 | 최완균 | 반도체 칩과 그의 제조 방법과 그 반도체 칩을 이용한 적층 칩패키지 및 그 적층 칩 패키지의 제조 방법 |
-
2000
- 2000-09-19 KR KR1020000054973A patent/KR100646468B1/ko active IP Right Grant
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5323060A (en) * | 1993-06-02 | 1994-06-21 | Micron Semiconductor, Inc. | Multichip module having a stacked chip arrangement |
JPH1070232A (ja) * | 1996-07-26 | 1998-03-10 | Honeywell Inc | チップ・スタックおよびコンデンサ取付の配置 |
KR19990069439A (ko) * | 1998-02-09 | 1999-09-06 | 김영환 | 스택 칩 패키지 |
JP2000058743A (ja) * | 1998-07-31 | 2000-02-25 | Sanyo Electric Co Ltd | 半導体装置 |
KR20000061035A (ko) * | 1999-03-23 | 2000-10-16 | 최완균 | 반도체 칩과 그의 제조 방법과 그 반도체 칩을 이용한 적층 칩패키지 및 그 적층 칩 패키지의 제조 방법 |
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