KR100634440B1 - 오토-리프레쉬 명령에 선별적으로 동작하는 디램, 그것의오토-리프레쉬 동작을 제어하는 메모리, 디램 및 메모리를포함한 메모리 시스템, 그리고 그것의 동작 방법들 - Google Patents
오토-리프레쉬 명령에 선별적으로 동작하는 디램, 그것의오토-리프레쉬 동작을 제어하는 메모리, 디램 및 메모리를포함한 메모리 시스템, 그리고 그것의 동작 방법들 Download PDFInfo
- Publication number
- KR100634440B1 KR100634440B1 KR1020040089950A KR20040089950A KR100634440B1 KR 100634440 B1 KR100634440 B1 KR 100634440B1 KR 1020040089950 A KR1020040089950 A KR 1020040089950A KR 20040089950 A KR20040089950 A KR 20040089950A KR 100634440 B1 KR100634440 B1 KR 100634440B1
- Authority
- KR
- South Korea
- Prior art keywords
- auto
- refresh
- memory
- command
- mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Memory System (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020040089950A KR100634440B1 (ko) | 2004-11-05 | 2004-11-05 | 오토-리프레쉬 명령에 선별적으로 동작하는 디램, 그것의오토-리프레쉬 동작을 제어하는 메모리, 디램 및 메모리를포함한 메모리 시스템, 그리고 그것의 동작 방법들 |
| US11/194,242 US7327625B2 (en) | 2004-11-05 | 2005-08-01 | Volatile memory devices with auto-refresh command unit and circuit for controlling auto-refresh operation thereof and related memory systems and operating methods |
| CN2005101067847A CN1779853B (zh) | 2004-11-05 | 2005-10-12 | 自动刷新的易失存储器设备及相关存储器系统和操作方法 |
| JP2005307418A JP4851156B2 (ja) | 2004-11-05 | 2005-10-21 | リフレッシュ方法、メモリシステム、ダイナミックランダムアクセスメモリ装置、メモリシステムの動作方法及びロジックエンベディッドメモリシステム |
| DE102005053171.7A DE102005053171B4 (de) | 2004-11-05 | 2005-11-02 | Auffrischungsverfahren, Speicher, Speichersystem und Betriebsverfahren |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020040089950A KR100634440B1 (ko) | 2004-11-05 | 2004-11-05 | 오토-리프레쉬 명령에 선별적으로 동작하는 디램, 그것의오토-리프레쉬 동작을 제어하는 메모리, 디램 및 메모리를포함한 메모리 시스템, 그리고 그것의 동작 방법들 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20060040380A KR20060040380A (ko) | 2006-05-10 |
| KR100634440B1 true KR100634440B1 (ko) | 2006-10-16 |
Family
ID=36273981
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020040089950A Expired - Fee Related KR100634440B1 (ko) | 2004-11-05 | 2004-11-05 | 오토-리프레쉬 명령에 선별적으로 동작하는 디램, 그것의오토-리프레쉬 동작을 제어하는 메모리, 디램 및 메모리를포함한 메모리 시스템, 그리고 그것의 동작 방법들 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7327625B2 (cg-RX-API-DMAC7.html) |
| JP (1) | JP4851156B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR100634440B1 (cg-RX-API-DMAC7.html) |
| CN (1) | CN1779853B (cg-RX-API-DMAC7.html) |
| DE (1) | DE102005053171B4 (cg-RX-API-DMAC7.html) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101053541B1 (ko) | 2010-03-30 | 2011-08-03 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
| US8392650B2 (en) * | 2010-04-01 | 2013-03-05 | Intel Corporation | Fast exit from self-refresh state of a memory device |
| KR102205695B1 (ko) * | 2014-09-05 | 2021-01-21 | 에스케이하이닉스 주식회사 | 리프레쉬 제어 회로 및 이를 이용한 반도체 장치 |
| KR20170045795A (ko) * | 2015-10-20 | 2017-04-28 | 삼성전자주식회사 | 메모리 장치 및 이를 포함하는 메모리 시스템 |
| KR20180100804A (ko) * | 2017-03-02 | 2018-09-12 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 구동 방법 |
| KR102398209B1 (ko) | 2017-11-06 | 2022-05-17 | 삼성전자주식회사 | 반도체 메모리 장치, 메모리 시스템 그리고 그것의 리프레쉬 방법 |
| US10622055B2 (en) | 2018-08-21 | 2020-04-14 | Micron Technology, Inc. | Apparatus for supplying power supply voltage to semiconductor chip including volatile memory cell |
| US20200258566A1 (en) * | 2019-02-12 | 2020-08-13 | Micron Technology, Inc. | Refresh rate management for memory |
| KR102856184B1 (ko) * | 2020-11-23 | 2025-09-05 | 에스케이하이닉스 주식회사 | 컨트롤러 및 이를 포함하는 메모리 시스템 |
| KR102866253B1 (ko) * | 2023-03-13 | 2025-09-29 | 성균관대학교산학협력단 | 프로세싱-인-메모리 제어 장치, 상기 프로세싱-인-메모리 제어 장치를 포함하는 컴퓨팅 장치 및 프로세싱-인-메모리 제어 방법 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1166842A (ja) | 1997-08-13 | 1999-03-09 | Toshiba Corp | 半導体記憶装置 |
| JPH11312386A (ja) * | 1998-03-30 | 1999-11-09 | Siemens Ag | Dramチップ |
| US6088268A (en) * | 1998-09-17 | 2000-07-11 | Atmel Corporation | Flash memory array with internal refresh |
| JP2000149550A (ja) | 1998-11-12 | 2000-05-30 | Nec Eng Ltd | 自動リフレッシュ機能付dram |
| JP2000260180A (ja) | 1999-03-08 | 2000-09-22 | Nec Corp | 半導体メモリ |
| JP2001118383A (ja) | 1999-10-20 | 2001-04-27 | Fujitsu Ltd | リフレッシュを自動で行うダイナミックメモリ回路 |
| US6751143B2 (en) * | 2002-04-11 | 2004-06-15 | Micron Technology, Inc. | Method and system for low power refresh of dynamic random access memories |
| JP2004022123A (ja) * | 2002-06-19 | 2004-01-22 | Murata Mach Ltd | インターフェース回路 |
| US6711082B1 (en) * | 2002-11-18 | 2004-03-23 | Infineon Technologies, Ag | Method and implementation of an on-chip self refresh feature |
| US7095669B2 (en) * | 2003-11-07 | 2006-08-22 | Infineon Technologies Ag | Refresh for dynamic cells with weak retention |
-
2004
- 2004-11-05 KR KR1020040089950A patent/KR100634440B1/ko not_active Expired - Fee Related
-
2005
- 2005-08-01 US US11/194,242 patent/US7327625B2/en active Active
- 2005-10-12 CN CN2005101067847A patent/CN1779853B/zh not_active Expired - Lifetime
- 2005-10-21 JP JP2005307418A patent/JP4851156B2/ja not_active Expired - Fee Related
- 2005-11-02 DE DE102005053171.7A patent/DE102005053171B4/de not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP4851156B2 (ja) | 2012-01-11 |
| CN1779853B (zh) | 2013-04-03 |
| US20060098510A1 (en) | 2006-05-11 |
| KR20060040380A (ko) | 2006-05-10 |
| CN1779853A (zh) | 2006-05-31 |
| US7327625B2 (en) | 2008-02-05 |
| DE102005053171B4 (de) | 2014-05-15 |
| DE102005053171A1 (de) | 2006-05-18 |
| JP2006134559A (ja) | 2006-05-25 |
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