KR100437221B1 - 반도체 장치의 제조 방법 및 제조 시스템, 및 반도체 장치 - Google Patents
반도체 장치의 제조 방법 및 제조 시스템, 및 반도체 장치 Download PDFInfo
- Publication number
- KR100437221B1 KR100437221B1 KR10-2001-0041821A KR20010041821A KR100437221B1 KR 100437221 B1 KR100437221 B1 KR 100437221B1 KR 20010041821 A KR20010041821 A KR 20010041821A KR 100437221 B1 KR100437221 B1 KR 100437221B1
- Authority
- KR
- South Korea
- Prior art keywords
- oxide film
- film
- processing
- semiconductor device
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
- H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Weting (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000349027A JP4437611B2 (ja) | 2000-11-16 | 2000-11-16 | 半導体装置の製造方法 |
| JPJP-P-2000-00349027 | 2000-11-16 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020038458A KR20020038458A (ko) | 2002-05-23 |
| KR100437221B1 true KR100437221B1 (ko) | 2004-06-23 |
Family
ID=18822503
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2001-0041821A Expired - Fee Related KR100437221B1 (ko) | 2000-11-16 | 2001-07-12 | 반도체 장치의 제조 방법 및 제조 시스템, 및 반도체 장치 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20020056700A1 (enExample) |
| JP (1) | JP4437611B2 (enExample) |
| KR (1) | KR100437221B1 (enExample) |
| TW (1) | TW507266B (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2003278750A1 (en) * | 2002-08-28 | 2004-03-19 | Tokyo Electron Limited | Method and system for dynamic modeling and recipe optimization of semiconductor etch processes |
| US6842661B2 (en) * | 2002-09-30 | 2005-01-11 | Advanced Micro Devices, Inc. | Process control at an interconnect level |
| US7265382B2 (en) * | 2002-11-12 | 2007-09-04 | Applied Materials, Inc. | Method and apparatus employing integrated metrology for improved dielectric etch efficiency |
| US8257546B2 (en) * | 2003-04-11 | 2012-09-04 | Applied Materials, Inc. | Method and system for monitoring an etch process |
| JP2004319574A (ja) * | 2003-04-11 | 2004-11-11 | Trecenti Technologies Inc | 半導体装置の製造方法、半導体製造装置の自動運転方法および自動運転システム、並びにcmp装置の自動運転方法 |
| US7235495B2 (en) * | 2003-07-31 | 2007-06-26 | Fsi International, Inc. | Controlled growth of highly uniform, oxide layers, especially ultrathin layers |
| KR20060121871A (ko) * | 2003-09-11 | 2006-11-29 | 에프에스아이 인터내쇼날 인크. | 음의 장 균등을 위한 음향 발산기 |
| WO2005027202A1 (en) * | 2003-09-11 | 2005-03-24 | Fsi International, Inc. | Semiconductor wafer immersion systems and treatments using modulated acoustic energy |
| JP2006245036A (ja) * | 2005-02-28 | 2006-09-14 | Seiko Epson Corp | 素子分離層の形成方法及び電子デバイスの製造方法、cmp装置 |
| JP4305401B2 (ja) * | 2005-02-28 | 2009-07-29 | セイコーエプソン株式会社 | 半導体装置 |
| US7596421B2 (en) | 2005-06-21 | 2009-09-29 | Kabushik Kaisha Toshiba | Process control system, process control method, and method of manufacturing electronic apparatus |
| US8070972B2 (en) * | 2006-03-30 | 2011-12-06 | Tokyo Electron Limited | Etching method and etching apparatus |
| JP4990548B2 (ja) | 2006-04-07 | 2012-08-01 | 株式会社日立製作所 | 半導体装置の製造方法 |
| JP5076426B2 (ja) * | 2006-09-29 | 2012-11-21 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP4971050B2 (ja) | 2007-06-21 | 2012-07-11 | 株式会社日立製作所 | 半導体装置の寸法測定装置 |
| JP5401797B2 (ja) | 2008-02-06 | 2014-01-29 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法及び半導体装置製造システム |
| JP2010087300A (ja) * | 2008-09-30 | 2010-04-15 | Toshiba Corp | 半導体装置の製造方法 |
| JP5853382B2 (ja) * | 2011-03-11 | 2016-02-09 | ソニー株式会社 | 半導体装置の製造方法、及び電子機器の製造方法 |
| US9005464B2 (en) * | 2011-06-27 | 2015-04-14 | International Business Machines Corporation | Tool for manufacturing semiconductor structures and method of use |
| CN104409348B (zh) * | 2014-11-10 | 2017-08-08 | 成都士兰半导体制造有限公司 | 沟槽器件的制作方法 |
| KR102281413B1 (ko) * | 2017-05-15 | 2021-07-23 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치의 제조 방법 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6060731A (ja) * | 1983-09-14 | 1985-04-08 | Hitachi Ltd | 半導体装置の製法 |
| US5399229A (en) * | 1993-05-13 | 1995-03-21 | Texas Instruments Incorporated | System and method for monitoring and evaluating semiconductor wafer fabrication |
| KR19980014172A (ko) * | 1996-08-08 | 1998-05-15 | 김광호 | 반도체 제조공정의 오버레이 측정방법 |
| JPH10163286A (ja) * | 1996-11-29 | 1998-06-19 | Nec Corp | 半導体装置の製造装置 |
| KR19990054210A (ko) * | 1997-12-26 | 1999-07-15 | 윤종용 | 반도체 제조용 증착설비의 막두께 조절방법 |
| KR100382021B1 (ko) * | 2000-02-03 | 2003-04-26 | 가부시끼가이샤 도시바 | 반도체 장치 제조 방법, 반도체 장치 제조 지원 시스템, 및 반도체 장치 제조 시스템 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6148239A (en) * | 1997-12-12 | 2000-11-14 | Advanced Micro Devices, Inc. | Process control system using feed forward control threads based on material groups |
-
2000
- 2000-11-16 JP JP2000349027A patent/JP4437611B2/ja not_active Expired - Fee Related
-
2001
- 2001-04-05 US US09/826,038 patent/US20020056700A1/en not_active Abandoned
- 2001-07-04 TW TW090116345A patent/TW507266B/zh not_active IP Right Cessation
- 2001-07-12 KR KR10-2001-0041821A patent/KR100437221B1/ko not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6060731A (ja) * | 1983-09-14 | 1985-04-08 | Hitachi Ltd | 半導体装置の製法 |
| US5399229A (en) * | 1993-05-13 | 1995-03-21 | Texas Instruments Incorporated | System and method for monitoring and evaluating semiconductor wafer fabrication |
| KR19980014172A (ko) * | 1996-08-08 | 1998-05-15 | 김광호 | 반도체 제조공정의 오버레이 측정방법 |
| JPH10163286A (ja) * | 1996-11-29 | 1998-06-19 | Nec Corp | 半導体装置の製造装置 |
| KR19990054210A (ko) * | 1997-12-26 | 1999-07-15 | 윤종용 | 반도체 제조용 증착설비의 막두께 조절방법 |
| KR100382021B1 (ko) * | 2000-02-03 | 2003-04-26 | 가부시끼가이샤 도시바 | 반도체 장치 제조 방법, 반도체 장치 제조 지원 시스템, 및 반도체 장치 제조 시스템 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2002151465A (ja) | 2002-05-24 |
| KR20020038458A (ko) | 2002-05-23 |
| US20020056700A1 (en) | 2002-05-16 |
| TW507266B (en) | 2002-10-21 |
| JP4437611B2 (ja) | 2010-03-24 |
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