KR100417451B1 - 판독전용메모리셀구조를제조하기위한방법 - Google Patents

판독전용메모리셀구조를제조하기위한방법 Download PDF

Info

Publication number
KR100417451B1
KR100417451B1 KR1019970709885A KR19970709885A KR100417451B1 KR 100417451 B1 KR100417451 B1 KR 100417451B1 KR 1019970709885 A KR1019970709885 A KR 1019970709885A KR 19970709885 A KR19970709885 A KR 19970709885A KR 100417451 B1 KR100417451 B1 KR 100417451B1
Authority
KR
South Korea
Prior art keywords
doped
trench
mask
strip
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019970709885A
Other languages
English (en)
Korean (ko)
Other versions
KR19990028565A (ko
Inventor
프란츠 호프만
볼프강 뢰스너
볼프강 크라우트슈나이더
로타르 리슈
Original Assignee
지멘스 악티엔게젤샤프트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 지멘스 악티엔게젤샤프트 filed Critical 지멘스 악티엔게젤샤프트
Publication of KR19990028565A publication Critical patent/KR19990028565A/ko
Application granted granted Critical
Publication of KR100417451B1 publication Critical patent/KR100417451B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1019970709885A 1995-07-05 1996-06-25 판독전용메모리셀구조를제조하기위한방법 Expired - Fee Related KR100417451B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19524478A DE19524478C2 (de) 1995-07-05 1995-07-05 Verfahren zur Herstellung einer Festwertspeicherzellenanordnung
DE19524478.8 1995-07-05

Publications (2)

Publication Number Publication Date
KR19990028565A KR19990028565A (ko) 1999-04-15
KR100417451B1 true KR100417451B1 (ko) 2004-03-19

Family

ID=7766070

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970709885A Expired - Fee Related KR100417451B1 (ko) 1995-07-05 1996-06-25 판독전용메모리셀구조를제조하기위한방법

Country Status (7)

Country Link
US (1) US5998261A (enExample)
EP (1) EP0836747B1 (enExample)
JP (1) JP3615765B2 (enExample)
KR (1) KR100417451B1 (enExample)
DE (2) DE19524478C2 (enExample)
IN (1) IN189218B (enExample)
WO (1) WO1997002599A1 (enExample)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19617646C2 (de) * 1996-05-02 1998-07-09 Siemens Ag Speicherzellenanordnung und ein Verfahren zu deren Herstellung
EP0924767B1 (de) * 1997-12-22 2011-05-11 Infineon Technologies AG EEPROM-Anordnung und Verfahren zu deren Herstellung
DE19808182C1 (de) * 1998-02-26 1999-08-12 Siemens Ag Elektrisch programmierbare Speicherzellenanordnung und ein Verfahren zu deren Herstellung
US6087222A (en) * 1998-03-05 2000-07-11 Taiwan Semiconductor Manufacturing Company Method of manufacture of vertical split gate flash memory device
DE19820651B4 (de) * 1998-05-08 2007-04-12 Kabelschlepp Gmbh Leitungsführungsanordnung mit einer zugentlastenden Befestigung wenigstens einer in der Leitungsführungsanordnung geführten Leitung
US6204123B1 (en) * 1998-10-30 2001-03-20 Sony Corporation Vertical floating gate transistor with epitaxial channel
US6358790B1 (en) * 1999-01-13 2002-03-19 Agere Systems Guardian Corp. Method of making a capacitor
DE19929233C1 (de) * 1999-06-25 2001-02-01 Siemens Ag Speicherzellenanordnung mit auf einer Grabenseitenwand angeordnetem Floating-Gate und Herstellungsverfahren
US6303436B1 (en) * 1999-09-21 2001-10-16 Mosel Vitelic, Inc. Method for fabricating a type of trench mask ROM cell
US6303439B1 (en) * 1999-11-24 2001-10-16 United Microelectronics Corp. Fabrication method for a two-bit flash memory cell
US6306708B1 (en) * 2000-02-02 2001-10-23 United Microelectronics Corp. Fabrication method for an electrically erasable programmable read only memory
JP3679970B2 (ja) * 2000-03-28 2005-08-03 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
DE10041749A1 (de) 2000-08-27 2002-03-14 Infineon Technologies Ag Vertikale nichtflüchtige Halbleiter-Speicherzelle sowie Verfahren zu deren Herstellung
US6458657B1 (en) * 2000-09-25 2002-10-01 Macronix International Co., Ltd. Method of fabricating gate
US6759707B2 (en) * 2001-03-08 2004-07-06 Micron Technology, Inc. 2F2 memory device system
US6599813B2 (en) * 2001-06-29 2003-07-29 International Business Machines Corporation Method of forming shallow trench isolation for thin silicon-on-insulator substrates
US6541815B1 (en) * 2001-10-11 2003-04-01 International Business Machines Corporation High-density dual-cell flash memory structure
US6952033B2 (en) * 2002-03-20 2005-10-04 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with buried bit-line and raised source line
US6917069B2 (en) * 2001-10-17 2005-07-12 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor
US6531733B1 (en) * 2001-12-17 2003-03-11 Windbond Electronics Corporation Structure of flash memory cell and method for manufacturing the same
TW564552B (en) * 2002-10-21 2003-12-01 Nanya Technology Corp A trench type stacked gate flash memory and the method to fabricate the same
TW583755B (en) * 2002-11-18 2004-04-11 Nanya Technology Corp Method for fabricating a vertical nitride read-only memory (NROM) cell
JP4042107B2 (ja) * 2003-02-14 2008-02-06 富士電機ホールディングス株式会社 磁気転写用マスタディスクの製造方法
US6936883B2 (en) * 2003-04-07 2005-08-30 Silicon Storage Technology, Inc. Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation
TW588438B (en) * 2003-08-08 2004-05-21 Nanya Technology Corp Multi-bit vertical memory cell and method of fabricating the same
US6933557B2 (en) * 2003-08-11 2005-08-23 Atmel Corporation Fowler-Nordheim block alterable EEPROM memory cell
KR100526891B1 (ko) * 2004-02-25 2005-11-09 삼성전자주식회사 반도체 소자에서의 버티컬 트랜지스터 구조 및 그에 따른형성방법
TWI231960B (en) * 2004-05-31 2005-05-01 Mosel Vitelic Inc Method of forming films in the trench
KR100668222B1 (ko) * 2005-06-13 2007-01-11 동부일렉트로닉스 주식회사 플래시 메모리 소자의 적층 게이트 구조 및 그 형성 방법
US7859026B2 (en) * 2006-03-16 2010-12-28 Spansion Llc Vertical semiconductor device
US7646054B2 (en) * 2006-09-19 2010-01-12 Sandisk Corporation Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches
JP4903873B2 (ja) * 2006-09-19 2012-03-28 サンディスク コーポレイション 基板トレンチ内にスペーサから形成されたフローティングゲートを有する不揮発性メモリセルアレイおよびその作製方法
US7696044B2 (en) * 2006-09-19 2010-04-13 Sandisk Corporation Method of making an array of non-volatile memory cells with floating gates formed of spacers in substrate trenches
US7800161B2 (en) * 2006-12-21 2010-09-21 Sandisk Corporation Flash NAND memory cell array with charge storage elements positioned in trenches
US7642160B2 (en) * 2006-12-21 2010-01-05 Sandisk Corporation Method of forming a flash NAND memory cell array with charge storage elements positioned in trenches
US20080164004A1 (en) * 2007-01-08 2008-07-10 Anastasia Kolesnichenko Method and system of electromagnetic stirring for continuous casting of medium and high carbon steels
US9461182B2 (en) * 2007-05-07 2016-10-04 Infineon Technologies Ag Memory cell
US10522549B2 (en) * 2018-02-17 2019-12-31 Varian Semiconductor Equipment Associates, Inc. Uniform gate dielectric for DRAM device
TWI683418B (zh) * 2018-06-26 2020-01-21 華邦電子股份有限公司 動態隨機存取記憶體及其製造、寫入與讀取方法
US20250183035A1 (en) * 2023-12-05 2025-06-05 Semiconductor Components Industries, Llc Methods for manufacturing power semiconductor devices and power semicondudctor structures

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6240774A (ja) * 1985-08-16 1987-02-21 Nippon Denso Co Ltd 不揮発性半導体記憶装置
JPS6272170A (ja) * 1985-09-26 1987-04-02 Toshiba Corp 半導体装置
JPS6286866A (ja) * 1985-10-14 1987-04-21 Nippon Denso Co Ltd 不揮発性半導体記憶装置
JPH07120717B2 (ja) * 1986-05-19 1995-12-20 日本電気株式会社 半導体記憶装置の製造方法
JPS6378573A (ja) * 1986-09-22 1988-04-08 Hitachi Ltd 半導体装置
JPS63102372A (ja) * 1986-10-20 1988-05-07 Fujitsu Ltd Eepromの製造方法
JPH01150364A (ja) * 1987-12-07 1989-06-13 Sony Corp メモリ装置の製法
JPH031574A (ja) * 1989-05-29 1991-01-08 Hitachi Ltd 不揮発性半導体記憶装置およびその製造方法
JPH07105453B2 (ja) * 1989-07-13 1995-11-13 株式会社東芝 半導体記憶装置のセル構造
US5180680A (en) * 1991-05-17 1993-01-19 United Microelectronics Corporation Method of fabricating electrically erasable read only memory cell
JPH0567791A (ja) * 1991-06-20 1993-03-19 Mitsubishi Electric Corp 電気的に書込および消去可能な半導体記憶装置およびその製造方法
US5414287A (en) * 1994-04-25 1995-05-09 United Microelectronics Corporation Process for high density split-gate memory cell for flash or EPROM
US5554550A (en) * 1994-09-14 1996-09-10 United Microelectronics Corporation Method of fabricating electrically eraseable read only memory cell having a trench

Also Published As

Publication number Publication date
JPH11508734A (ja) 1999-07-27
WO1997002599A1 (de) 1997-01-23
KR19990028565A (ko) 1999-04-15
JP3615765B2 (ja) 2005-02-02
IN189218B (enExample) 2003-01-04
EP0836747B1 (de) 2001-09-19
DE19524478C2 (de) 2002-03-14
DE59607727D1 (de) 2001-10-25
EP0836747A1 (de) 1998-04-22
DE19524478A1 (de) 1997-01-09
US5998261A (en) 1999-12-07

Similar Documents

Publication Publication Date Title
KR19990028565A (ko) 판독전용 메모리 셀장치를 제조하기 위한 방법
KR0167467B1 (ko) 이중 채널을 갖는 soi 상의 트렌치 eeprom 구조와 이의 제조방법
US6191459B1 (en) Electrically programmable memory cell array, using charge carrier traps and insulation trenches
US6927133B2 (en) Semiconductor memory capable of being driven at low voltage and its manufacture method
US6743675B2 (en) Floating gate memory fabrication methods comprising a field dielectric etch with a horizontal etch component
US6562681B2 (en) Nonvolatile memories with floating gate spacers, and methods of fabrication
US7074672B2 (en) Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor
US7301196B2 (en) Nonvolatile memories and methods of fabrication
US6373095B1 (en) NVRAM cell having increased coupling ratio between a control gate and floating gate without an increase in cell area
US6765261B2 (en) Semiconductor device comprising a non-volatile memory
KR20040087925A (ko) 공동들에 부동 게이트들이 형성된 비휘발성 부동 게이트메모리 셀, 및 이의 어레이, 및 형성방법
US5943572A (en) Electrically writable and erasable read-only memory cell arrangement and method for its production
US7585724B2 (en) FLASH memory device and method of manufacture
US7151021B2 (en) Bi-directional read/program non-volatile floating gate memory cell and array thereof, and method of formation
US5882969A (en) Method for manufacturing an electrically writeable and erasable read-only memory cell arrangement
US6274432B1 (en) Method of making contactless nonvolatile semiconductor memory device having buried bit lines surrounded by grooved insulators
US6528841B2 (en) NAND type flash memory device having dummy region
US6995060B2 (en) Fabrication of integrated circuit elements in structures with protruding features
CN1189919A (zh) 制造只读存储器单元阵列的方法
KR100396387B1 (ko) 저장 셀 장치 및 그 제조 방법
KR0152496B1 (ko) 이이피롬 셀, 집적회로 이이피롬 이중 게이트 전계효과 트랜지스터 형성 방법 및 이이피롬 메모리 어레이 형성 방법
US7358559B2 (en) Bi-directional read/program non-volatile floating gate memory array, and method of formation
KR100420440B1 (ko) 반도체 메모리 장치 및 그 제조 방법
US20070138538A1 (en) Method of forming self-aligned floating gate array and flash memory device including self-aligned floating gate array
KR20060043534A (ko) 트렌치 내에 독립적인 제어 가능한 제어 게이트를 갖는 매립형 비트 라인 불휘발성 부동 게이트 메모리 셀, 및 그 어레이, 및 형성 방법

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R11-asn-PN2301

St.27 status event code: A-3-3-R10-R13-asn-PN2301

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

Fee payment year number: 1

St.27 status event code: A-2-2-U10-U12-oth-PR1002

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

Not in force date: 20070125

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

St.27 status event code: A-4-4-U10-U13-oth-PC1903

PC1903 Unpaid annual fee

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20070125

St.27 status event code: N-4-6-H10-H13-oth-PC1903

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000