KR100354468B1 - 클럭 동기 회로 - Google Patents

클럭 동기 회로 Download PDF

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Publication number
KR100354468B1
KR100354468B1 KR1020000036987A KR20000036987A KR100354468B1 KR 100354468 B1 KR100354468 B1 KR 100354468B1 KR 1020000036987 A KR1020000036987 A KR 1020000036987A KR 20000036987 A KR20000036987 A KR 20000036987A KR 100354468 B1 KR100354468 B1 KR 100354468B1
Authority
KR
South Korea
Prior art keywords
circuit
delay
clock
output
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020000036987A
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English (en)
Korean (ko)
Other versions
KR20010007603A (ko
Inventor
가또고지
가모시다마사히로
오시마시게오
오따께히로유끼
Original Assignee
가부시끼가이샤 도시바
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Publication date
Application filed by 가부시끼가이샤 도시바 filed Critical 가부시끼가이샤 도시바
Publication of KR20010007603A publication Critical patent/KR20010007603A/ko
Application granted granted Critical
Publication of KR100354468B1 publication Critical patent/KR100354468B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
KR1020000036987A 1999-06-30 2000-06-30 클럭 동기 회로 Expired - Fee Related KR100354468B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1999-187052 1999-06-30
JP11187052A JP2001014847A (ja) 1999-06-30 1999-06-30 クロック同期回路

Publications (2)

Publication Number Publication Date
KR20010007603A KR20010007603A (ko) 2001-01-26
KR100354468B1 true KR100354468B1 (ko) 2002-09-30

Family

ID=16199342

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020000036987A Expired - Fee Related KR100354468B1 (ko) 1999-06-30 2000-06-30 클럭 동기 회로

Country Status (3)

Country Link
US (1) US6292412B1 (enExample)
JP (1) JP2001014847A (enExample)
KR (1) KR100354468B1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11726677B2 (en) 2020-01-10 2023-08-15 Samsung Electronics Co., Ltd. Storage device configured to change power state based on reference clock from host device and method for operating the same

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002109880A (ja) * 2000-09-28 2002-04-12 Toshiba Corp クロック同期回路
US6459628B1 (en) * 2001-04-02 2002-10-01 Advanced Micro Devices, Inc. System and method to facilitate stabilization of reference voltage signals in memory devices
JP2002358782A (ja) * 2001-05-31 2002-12-13 Nec Corp 半導体記憶装置
JP4883850B2 (ja) * 2001-06-29 2012-02-22 ルネサスエレクトロニクス株式会社 半導体装置
JP4005779B2 (ja) * 2001-07-03 2007-11-14 株式会社東芝 クロック同期回路
JP2003084721A (ja) * 2001-09-12 2003-03-19 Fujitsu Display Technologies Corp 表示装置用駆動回路装置とそれを利用した表示装置
US6771553B2 (en) * 2001-10-18 2004-08-03 Micron Technology, Inc. Low power auto-refresh circuit and method for dynamic random access memories
JP2003228982A (ja) 2002-01-29 2003-08-15 Hitachi Ltd 半導体集積回路装置
JP4104886B2 (ja) 2002-03-20 2008-06-18 株式会社ルネサステクノロジ 半導体装置
KR100477836B1 (ko) * 2002-05-30 2005-03-23 주식회사 하이닉스반도체 클럭 드라이버
JP2004005821A (ja) * 2002-05-31 2004-01-08 Toshiba Corp 同期型半導体記憶装置
US6731548B2 (en) * 2002-06-07 2004-05-04 Micron Technology, Inc. Reduced power registered memory module and method
KR100878527B1 (ko) * 2002-07-08 2009-01-13 삼성전자주식회사 Ｎａｎｄ 형 플래쉬 메모리 제어기와 제어기에서 사용되는클럭제어방법
KR100507874B1 (ko) * 2002-10-30 2005-08-17 주식회사 하이닉스반도체 클럭 동기화 회로를 구비한 동기식 반도체 메모리 장치 및클럭 동기화 회로의 클럭 트리 온/오프 제어회로
US7577048B2 (en) * 2007-12-31 2009-08-18 Icera, Inc. Memory interface
KR20100115613A (ko) 2009-04-20 2010-10-28 삼성전자주식회사 레이턴시 전류 소모를 줄일 수 있는 반도체 메모리 장치
JP5730793B2 (ja) * 2012-01-17 2015-06-10 アラクサラネットワークス株式会社 ネットワーク中継装置およびその制御方法
KR102161083B1 (ko) * 2013-12-04 2020-10-05 에스케이하이닉스 주식회사 반도체 메모리 장치
US10177751B2 (en) * 2016-05-27 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Delay line with short recovery time
JP2019053444A (ja) * 2017-09-13 2019-04-04 東芝メモリ株式会社 半導体集積回路及び半導体装置
US11456729B1 (en) 2021-03-26 2022-09-27 Analog Devices, Inc. Deskew cell for delay and pulse width adjustment

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970051196A (ko) * 1995-12-11 1997-07-29 김광호 반도체 메모리의 클럭 동기회로
JPH1116349A (ja) * 1997-06-26 1999-01-22 Mitsubishi Electric Corp 同期型半導体記憶装置
JP2000030456A (ja) * 1998-07-14 2000-01-28 Fujitsu Ltd メモリデバイス
KR20000035737A (ko) * 1998-11-27 2000-06-26 니시무로 타이죠 클럭 동기 시스템

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3410922B2 (ja) 1996-04-23 2003-05-26 株式会社東芝 クロック制御回路
JP2000311028A (ja) * 1999-04-28 2000-11-07 Hitachi Ltd 位相制御回路、半導体装置及び半導体メモリ

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970051196A (ko) * 1995-12-11 1997-07-29 김광호 반도체 메모리의 클럭 동기회로
JPH1116349A (ja) * 1997-06-26 1999-01-22 Mitsubishi Electric Corp 同期型半導体記憶装置
JP2000030456A (ja) * 1998-07-14 2000-01-28 Fujitsu Ltd メモリデバイス
KR20000035737A (ko) * 1998-11-27 2000-06-26 니시무로 타이죠 클럭 동기 시스템

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11726677B2 (en) 2020-01-10 2023-08-15 Samsung Electronics Co., Ltd. Storage device configured to change power state based on reference clock from host device and method for operating the same

Also Published As

Publication number Publication date
KR20010007603A (ko) 2001-01-26
JP2001014847A (ja) 2001-01-19
US6292412B1 (en) 2001-09-18

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