KR100348233B1 - 반도체장치의제조방법 - Google Patents

반도체장치의제조방법 Download PDF

Info

Publication number
KR100348233B1
KR100348233B1 KR1019950012817A KR19950012817A KR100348233B1 KR 100348233 B1 KR100348233 B1 KR 100348233B1 KR 1019950012817 A KR1019950012817 A KR 1019950012817A KR 19950012817 A KR19950012817 A KR 19950012817A KR 100348233 B1 KR100348233 B1 KR 100348233B1
Authority
KR
South Korea
Prior art keywords
semiconductor
layer
slice
conductive
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019950012817A
Other languages
English (en)
Korean (ko)
Other versions
KR950034534A (ko
Inventor
로날드데커
헨리쿠스고데프리더스라파엘마스
빌헬르무스테오도러스안토니우스요하네스반덴아인덴
Original Assignee
코닌클리케 필립스 일렉트로닉스 엔.브이.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 코닌클리케 필립스 일렉트로닉스 엔.브이. filed Critical 코닌클리케 필립스 일렉트로닉스 엔.브이.
Publication of KR950034534A publication Critical patent/KR950034534A/ko
Application granted granted Critical
Publication of KR100348233B1 publication Critical patent/KR100348233B1/ko
Assigned to 엔엑스피 비 브이 reassignment 엔엑스피 비 브이 권리의 전부이전등록 Assignors: 코닌클리케 필립스 일렉트로닉스 엔.브이.
Assigned to 인벤사스 코포레이션 reassignment 인벤사스 코포레이션 권리의 전부이전등록 Assignors: 엔엑스피 비 브이
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7426—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/743—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7432—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Wire Bonding (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Weting (AREA)
KR1019950012817A 1994-05-24 1995-05-23 반도체장치의제조방법 Expired - Lifetime KR100348233B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
BE09400527 1994-05-24
BE941527 1994-05-24
BE9400527A BE1008384A3 (nl) 1994-05-24 1994-05-24 Werkwijze voor het vervaardigen van halfgeleiderinrichtingen met halfgeleiderelementen gevormd in een op een dragerplak aangebrachte laag halfgeleidermateriaal.

Publications (2)

Publication Number Publication Date
KR950034534A KR950034534A (ko) 1995-12-28
KR100348233B1 true KR100348233B1 (ko) 2002-11-02

Family

ID=3888174

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950012817A Expired - Lifetime KR100348233B1 (ko) 1994-05-24 1995-05-23 반도체장치의제조방법

Country Status (8)

Country Link
US (1) US5504036A (https=)
EP (1) EP0684643B1 (https=)
JP (1) JP2987081B2 (https=)
KR (1) KR100348233B1 (https=)
CN (1) CN1061783C (https=)
BE (1) BE1008384A3 (https=)
DE (1) DE69505048T2 (https=)
TW (1) TW288193B (https=)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6204074B1 (en) * 1995-01-09 2001-03-20 International Business Machines Corporation Chip design process for wire bond and flip-chip package
EP0770267B1 (en) * 1995-05-10 2002-07-17 Koninklijke Philips Electronics N.V. Method of manufacturing a device, by which method a substrate with semiconductor element and conductor tracks is glued to a support body with metallization
CA2246057C (en) * 1996-01-31 2005-12-20 Cochlear Limited Thin film fabrication technique for implantable electrodes
US5698474A (en) * 1996-02-26 1997-12-16 Hypervision, Inc. High speed diamond-based machining of silicon semiconductor die in wafer and packaged form for backside emission microscope detection
JP2839007B2 (ja) * 1996-04-18 1998-12-16 日本電気株式会社 半導体装置及びその製造方法
US5965933A (en) * 1996-05-28 1999-10-12 Young; William R. Semiconductor packaging apparatus
US6882030B2 (en) 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
WO1998019337A1 (en) * 1996-10-29 1998-05-07 Trusi Technologies, Llc Integrated circuits and methods for their fabrication
EP1503406A3 (en) * 1996-10-29 2009-07-08 Tru-Si Technologies, Inc. Back-side contact pads of a semiconductor chip
US5897371A (en) * 1996-12-19 1999-04-27 Cypress Semiconductor Corp. Alignment process compatible with chemical mechanical polishing
EP1148546A1 (de) * 2000-04-19 2001-10-24 Infineon Technologies AG Verfahren zur Justierung von Strukturen auf einem Halbleiter-substrat
US6717254B2 (en) 2001-02-22 2004-04-06 Tru-Si Technologies, Inc. Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture
JP3788268B2 (ja) * 2001-05-14 2006-06-21 ソニー株式会社 半導体装置の製造方法
TW487958B (en) * 2001-06-07 2002-05-21 Ind Tech Res Inst Manufacturing method of thin film transistor panel
US6753199B2 (en) * 2001-06-29 2004-06-22 Xanoptix, Inc. Topside active optical device apparatus and method
US7831151B2 (en) 2001-06-29 2010-11-09 John Trezza Redundant optical device array
US6787916B2 (en) 2001-09-13 2004-09-07 Tru-Si Technologies, Inc. Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity
JP4110390B2 (ja) * 2002-03-19 2008-07-02 セイコーエプソン株式会社 半導体装置の製造方法
US20030189215A1 (en) * 2002-04-09 2003-10-09 Jong-Lam Lee Method of fabricating vertical structure leds
US8294172B2 (en) 2002-04-09 2012-10-23 Lg Electronics Inc. Method of fabricating vertical devices using a metal support film
US6841802B2 (en) * 2002-06-26 2005-01-11 Oriol, Inc. Thin film light emitting diode
JP2005150686A (ja) 2003-10-22 2005-06-09 Sharp Corp 半導体装置およびその製造方法
US20080094725A1 (en) * 2004-08-09 2008-04-24 Koninklijke Philips Electronics, N.V. Method for bringing together at least two predetermined quantities of fluid and/or gas
WO2006038150A2 (en) * 2004-10-05 2006-04-13 Koninklijke Philips Electronics N.V. Semiconductor device and use thereof
CN100555589C (zh) * 2005-06-29 2009-10-28 皇家飞利浦电子股份有限公司 制造半导体组件的方法
JP2008078486A (ja) * 2006-09-22 2008-04-03 Oki Electric Ind Co Ltd 半導体素子
GB2492532B (en) * 2011-06-27 2015-06-03 Pragmatic Printing Ltd Transistor and its method of manufacture
GB2492442B (en) * 2011-06-27 2015-11-04 Pragmatic Printing Ltd Transistor and its method of manufacture
US9728498B2 (en) * 2015-06-30 2017-08-08 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4532003A (en) * 1982-08-09 1985-07-30 Harris Corporation Method of fabrication bipolar transistor with improved base collector breakdown voltage and collector series resistance
US4596069A (en) * 1984-07-13 1986-06-24 Texas Instruments Incorporated Three dimensional processing for monolithic IMPATTs
JPS6418248A (en) * 1987-07-13 1989-01-23 Nec Corp Manufacture of semiconductor device
US5081061A (en) * 1990-02-23 1992-01-14 Harris Corporation Manufacturing ultra-thin dielectrically isolated wafers
US5347154A (en) * 1990-11-15 1994-09-13 Seiko Instruments Inc. Light valve device using semiconductive composite substrate
US5091330A (en) * 1990-12-28 1992-02-25 Motorola, Inc. Method of fabricating a dielectric isolated area

Also Published As

Publication number Publication date
EP0684643A1 (en) 1995-11-29
BE1008384A3 (nl) 1996-04-02
DE69505048D1 (de) 1998-11-05
EP0684643B1 (en) 1998-09-30
CN1115118A (zh) 1996-01-17
US5504036A (en) 1996-04-02
JPH07321298A (ja) 1995-12-08
JP2987081B2 (ja) 1999-12-06
TW288193B (https=) 1996-10-11
DE69505048T2 (de) 1999-05-12
KR950034534A (ko) 1995-12-28
CN1061783C (zh) 2001-02-07

Similar Documents

Publication Publication Date Title
KR100348233B1 (ko) 반도체장치의제조방법
JP4319251B2 (ja) 半導体素子を有し導体トラックが形成されている基板が接着層により結合されている支持本体を有する半導体装置
US4041518A (en) MIS semiconductor device and method of manufacturing the same
US6057572A (en) Semiconductor integrated circuit device with MOS transistor and MOS capacitor and method for manufacturing the same
JPH033389B2 (https=)
US4231051A (en) Process for producing minimal geometry devices for VSLI applications utilizing self-aligned gates and self-aligned contacts, and resultant structures
JP4060882B2 (ja) 電子装置の製造方法
US4525733A (en) Patterning method for reducing hillock density in thin metal films and a structure produced thereby
EP0031367A1 (en) METHOD FOR FORMING A VOLTAGE INVARIANT CAPACITOR FOR A MOS INTEGRATED CIRCUIT DEVICE.
JPS60100469A (ja) 半導体装置
US5863806A (en) Method of forming microcoil structure for integrated circuits
US4722912A (en) Method of forming a semiconductor structure
JPH0210730A (ja) 集積回路チップ上の電界効果トランジスタ用のフィールド・アイソレーション形成方法と構造
JPH06302791A (ja) 半導体基板及びその製造方法
US5770464A (en) Method for fabricating semiconductor devices having lightly doped drain
US5620911A (en) Method for fabricating a metal field effect transistor having a recessed gate
US6767776B2 (en) Semiconductor device, and method for manufacturing the same
EP0155311B1 (en) Method for repair of buried contacts in mosfet devices
JP2008091935A (ja) 集積回路
JPH05129335A (ja) 縦型トランジスタの製造方法
JPS58170030A (ja) 半導体装置の製造方法
JPH10326896A (ja) 半導体装置及びその製造方法
KR0167253B1 (ko) 반도체 소자 제조방법
KR100334390B1 (ko) 이중 게이트산화막 형성방법
JPS6047437A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

FPAY Annual fee payment

Payment date: 20120628

Year of fee payment: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

FPAY Annual fee payment

Payment date: 20130723

Year of fee payment: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

FPAY Annual fee payment

Payment date: 20140718

Year of fee payment: 13

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

EXPY Expiration of term
PC1801 Expiration of term

St.27 status event code: N-4-6-H10-H14-oth-PC1801

Not in force date: 20150524

Ip right cessation event data comment text: Termination Category : EXPIRATION_OF_DURATION

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

R18 Changes to party contact information recorded

Free format text: ST27 STATUS EVENT CODE: A-5-5-R10-R18-OTH-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000