KR100281986B1 - 집적 회로 디바이스의 전기적 잡음을 감소시키기 위한 구조물 및 이의 감소 방법 - Google Patents

집적 회로 디바이스의 전기적 잡음을 감소시키기 위한 구조물 및 이의 감소 방법 Download PDF

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Publication number
KR100281986B1
KR100281986B1 KR1019930017345A KR930017345A KR100281986B1 KR 100281986 B1 KR100281986 B1 KR 100281986B1 KR 1019930017345 A KR1019930017345 A KR 1019930017345A KR 930017345 A KR930017345 A KR 930017345A KR 100281986 B1 KR100281986 B1 KR 100281986B1
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KR
South Korea
Prior art keywords
bit lines
package material
lead frame
coupled
dielectric constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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KR1019930017345A
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English (en)
Korean (ko)
Other versions
KR940008023A (ko
Inventor
마이클에이.램슨
Original Assignee
윌리엄 비. 켐플러
텍사스 인스트루먼츠 인코포레이티드
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Application filed by 윌리엄 비. 켐플러, 텍사스 인스트루먼츠 인코포레이티드 filed Critical 윌리엄 비. 켐플러
Publication of KR940008023A publication Critical patent/KR940008023A/ko
Application granted granted Critical
Publication of KR100281986B1 publication Critical patent/KR100281986B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
KR1019930017345A 1992-09-02 1993-09-01 집적 회로 디바이스의 전기적 잡음을 감소시키기 위한 구조물 및 이의 감소 방법 Expired - Lifetime KR100281986B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US93918892A 1992-09-02 1992-09-02
US07/939,188 1992-09-02
US7/939,188 1992-09-02

Publications (2)

Publication Number Publication Date
KR940008023A KR940008023A (ko) 1994-04-28
KR100281986B1 true KR100281986B1 (ko) 2001-03-02

Family

ID=25472701

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930017345A Expired - Lifetime KR100281986B1 (ko) 1992-09-02 1993-09-01 집적 회로 디바이스의 전기적 잡음을 감소시키기 위한 구조물 및 이의 감소 방법

Country Status (6)

Country Link
US (1) US5334802A (enExample)
EP (1) EP0586163B1 (enExample)
JP (1) JPH0794660A (enExample)
KR (1) KR100281986B1 (enExample)
DE (1) DE69314584T2 (enExample)
TW (1) TW229331B (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6525976B1 (en) 2000-10-24 2003-02-25 Excellatron Solid State, Llc Systems and methods for reducing noise in mixed-mode integrated circuits
KR20030084086A (ko) * 2002-04-24 2003-11-01 엑셀라트론 솔리드 스테이트 엘엘씨 혼합-모드 집적회로의 노이즈 감소를 위한 시스템 및 방법
US7830221B2 (en) * 2008-01-25 2010-11-09 Micron Technology, Inc. Coupling cancellation scheme

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4862245A (en) * 1985-04-18 1989-08-29 International Business Machines Corporation Package semiconductor chip
JPH0279463A (ja) * 1988-09-14 1990-03-20 Mitsubishi Electric Corp 半導体記憶装置
KR0158868B1 (ko) * 1988-09-20 1998-12-01 미다 가쓰시게 반도체장치
US4916519A (en) * 1989-05-30 1990-04-10 International Business Machines Corporation Semiconductor package
DE69034069T2 (de) * 1989-06-30 2004-04-01 Texas Instruments Inc., Dallas Verfahren zur Verpackung einer Halbleitervorrichtung
JPH088330B2 (ja) * 1989-07-19 1996-01-29 日本電気株式会社 Ｌｏｃ型リードフレームを備えた半導体集積回路装置
US4965654A (en) * 1989-10-30 1990-10-23 International Business Machines Corporation Semiconductor package with ground plane
US5197184A (en) * 1990-09-11 1993-03-30 Hughes Aircraft Company Method of forming three-dimensional circuitry

Also Published As

Publication number Publication date
KR940008023A (ko) 1994-04-28
DE69314584D1 (de) 1997-11-20
EP0586163A2 (en) 1994-03-09
US5334802A (en) 1994-08-02
DE69314584T2 (de) 1998-02-19
JPH0794660A (ja) 1995-04-07
EP0586163A3 (enExample) 1994-03-23
TW229331B (enExample) 1994-09-01
EP0586163B1 (en) 1997-10-15

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