KR100273989B1 - 반도체장치의콘택형성방법 - Google Patents

반도체장치의콘택형성방법 Download PDF

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Publication number
KR100273989B1
KR100273989B1 KR1019970062866A KR19970062866A KR100273989B1 KR 100273989 B1 KR100273989 B1 KR 100273989B1 KR 1019970062866 A KR1019970062866 A KR 1019970062866A KR 19970062866 A KR19970062866 A KR 19970062866A KR 100273989 B1 KR100273989 B1 KR 100273989B1
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KR
South Korea
Prior art keywords
film
glue film
forming
contact
glue
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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KR1019970062866A
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English (en)
Korean (ko)
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KR19990042145A (ko
Inventor
김정석
박주욱
Original Assignee
윤종용
삼성전자주식회사
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Filing date
Publication date
Application filed by 윤종용, 삼성전자주식회사 filed Critical 윤종용
Priority to KR1019970062866A priority Critical patent/KR100273989B1/ko
Priority to TW087112869A priority patent/TW396532B/zh
Priority to US09/175,698 priority patent/US6140223A/en
Priority to JP33311198A priority patent/JP4027519B2/ja
Publication of KR19990042145A publication Critical patent/KR19990042145A/ko
Application granted granted Critical
Publication of KR100273989B1 publication Critical patent/KR100273989B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846—Layer combinations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1019970062866A 1997-11-25 1997-11-25 반도체장치의콘택형성방법 Expired - Fee Related KR100273989B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019970062866A KR100273989B1 (ko) 1997-11-25 1997-11-25 반도체장치의콘택형성방법
TW087112869A TW396532B (en) 1997-11-25 1998-08-05 A method of forming contacts in a semiconductor device
US09/175,698 US6140223A (en) 1997-11-25 1998-10-20 Methods of forming contacts for integrated circuits using chemical vapor deposition and physical vapor deposition
JP33311198A JP4027519B2 (ja) 1997-11-25 1998-11-24 半導体装置のコンタクト形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019970062866A KR100273989B1 (ko) 1997-11-25 1997-11-25 반도체장치의콘택형성방법

Publications (2)

Publication Number Publication Date
KR19990042145A KR19990042145A (ko) 1999-06-15
KR100273989B1 true KR100273989B1 (ko) 2001-01-15

Family

ID=19525601

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970062866A Expired - Fee Related KR100273989B1 (ko) 1997-11-25 1997-11-25 반도체장치의콘택형성방법

Country Status (4)

Country Link
US (1) US6140223A (enExample)
JP (1) JP4027519B2 (enExample)
KR (1) KR100273989B1 (enExample)
TW (1) TW396532B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040038147A (ko) * 2002-10-31 2004-05-08 주식회사 하이닉스반도체 반도체 소자의 배리어 형성방법
KR100685622B1 (ko) * 2001-12-17 2007-02-22 매그나칩 반도체 유한회사 반도체 소자의 콘택 플러그 형성 방법

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6475912B1 (en) 1998-06-01 2002-11-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method and apparatus for fabricating the same while minimizing operating failures and optimizing yield
KR100331545B1 (ko) 1998-07-22 2002-04-06 윤종용 다단계 화학 기상 증착 방법에 의한 다층 질화티타늄막 형성방법및 이를 이용한 반도체 소자의 제조방법
TW426953B (en) * 1999-01-22 2001-03-21 United Microelectronics Corp Method of producing metal plug
US6316353B1 (en) * 1999-02-18 2001-11-13 Micron Technology, Inc. Method of forming conductive connections
US6610151B1 (en) * 1999-10-02 2003-08-26 Uri Cohen Seed layers for interconnects and methods and apparatus for their fabrication
US7105434B2 (en) 1999-10-02 2006-09-12 Uri Cohen Advanced seed layery for metallic interconnects
US6569751B1 (en) * 2000-07-17 2003-05-27 Lsi Logic Corporation Low via resistance system
KR100499557B1 (ko) * 2001-06-11 2005-07-07 주식회사 하이닉스반도체 반도체소자의 배선 형성방법
US20020192948A1 (en) * 2001-06-15 2002-12-19 Applied Materials, Inc. Integrated barrier layer structure for copper contact level metallization
KR100440261B1 (ko) * 2001-12-22 2004-07-15 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성 방법
JP2003332426A (ja) 2002-05-17 2003-11-21 Renesas Technology Corp 半導体装置の製造方法および半導体装置
US20040175926A1 (en) * 2003-03-07 2004-09-09 Advanced Micro Devices, Inc. Method for manufacturing a semiconductor component having a barrier-lined opening
KR100555514B1 (ko) * 2003-08-22 2006-03-03 삼성전자주식회사 저 저항 텅스텐 배선을 갖는 반도체 메모리 소자 및 그제조방법
US6821886B1 (en) 2003-09-05 2004-11-23 Chartered Semiconductor Manufacturing Ltd. IMP TiN barrier metal process
US20050112876A1 (en) * 2003-11-26 2005-05-26 Chih-Ta Wu Method to form a robust TiCI4 based CVD TiN film
KR100642763B1 (ko) * 2005-09-06 2006-11-10 삼성전자주식회사 반도체 소자의 ＴｉＮ 막 구조, 그 제조 방법, ＴｉＮ 막구조를 채용하는 반도체 소자 및 그 제조방법
KR100818711B1 (ko) * 2006-12-07 2008-04-01 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
US7833893B2 (en) * 2007-07-10 2010-11-16 International Business Machines Corporation Method for forming conductive structures
US7727882B1 (en) * 2007-12-17 2010-06-01 Novellus Systems, Inc. Compositionally graded titanium nitride film for diffusion barrier applications
US9390909B2 (en) 2013-11-07 2016-07-12 Novellus Systems, Inc. Soft landing nanolaminates for advanced patterning
US9478411B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method to tune TiOx stoichiometry using atomic layer deposited Ti film to minimize contact resistance for TiOx/Ti based MIS contact scheme for CMOS
US9478438B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method and apparatus to deposit pure titanium thin film at low temperature using titanium tetraiodide precursor
CN104538347A (zh) * 2014-12-31 2015-04-22 上海华虹宏力半导体制造有限公司 接触孔的工艺方法
JP2018107227A (ja) * 2016-12-26 2018-07-05 ソニーセミコンダクタソリューションズ株式会社 半導体装置、半導体装置の製造方法、及び、固体撮像素子
CN111540828A (zh) * 2020-03-23 2020-08-14 江苏时代全芯存储科技股份有限公司 相变存储器的形成方法
CN112542435A (zh) * 2020-12-04 2021-03-23 上海擎茂微电子科技有限公司 一种防止表面金属层脱焊的半导体装置及其制造方法
CN113035777B (zh) * 2021-04-28 2023-04-28 上海华虹宏力半导体制造有限公司 一种tsv孔的cvd填充方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970001883B1 (ko) * 1992-12-30 1997-02-18 삼성전자 주식회사 반도체장치 및 그 제조방법
US5571751A (en) * 1994-05-09 1996-11-05 National Semiconductor Corporation Interconnect structures for integrated circuits
KR100220935B1 (ko) * 1995-12-15 1999-09-15 김영환 메탈 콘택 형성방법
KR100225946B1 (ko) * 1996-06-27 1999-10-15 김영환 반도체 소자의 금속 배선 형성방법
US5970374A (en) * 1996-10-18 1999-10-19 Chartered Semiconductor Manufacturing Ltd. Method for forming contacts and vias with improved barrier metal step-coverage
US5994181A (en) * 1997-05-19 1999-11-30 United Microelectronics Corp. Method for forming a DRAM cell electrode
US5895267A (en) * 1997-07-09 1999-04-20 Lsi Logic Corporation Method to obtain a low resistivity and conformity chemical vapor deposition titanium film
US5913145A (en) * 1997-08-28 1999-06-15 Texas Instruments Incorporated Method for fabricating thermally stable contacts with a diffusion barrier formed at high temperatures
US5972179A (en) * 1997-09-30 1999-10-26 Lucent Technologies Inc. Silicon IC contacts using composite TiN barrier layer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100685622B1 (ko) * 2001-12-17 2007-02-22 매그나칩 반도체 유한회사 반도체 소자의 콘택 플러그 형성 방법
KR20040038147A (ko) * 2002-10-31 2004-05-08 주식회사 하이닉스반도체 반도체 소자의 배리어 형성방법

Also Published As

Publication number Publication date
JPH11233631A (ja) 1999-08-27
KR19990042145A (ko) 1999-06-15
JP4027519B2 (ja) 2007-12-26
TW396532B (en) 2000-07-01
US6140223A (en) 2000-10-31

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