KR100216642B1 - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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Publication number
KR100216642B1
KR100216642B1 KR1019960007924A KR19960007924A KR100216642B1 KR 100216642 B1 KR100216642 B1 KR 100216642B1 KR 1019960007924 A KR1019960007924 A KR 1019960007924A KR 19960007924 A KR19960007924 A KR 19960007924A KR 100216642 B1 KR100216642 B1 KR 100216642B1
Authority
KR
South Korea
Prior art keywords
insulating film
wiring pattern
semiconductor device
connection terminal
external connection
Prior art date
Application number
KR1019960007924A
Other languages
English (en)
Korean (ko)
Other versions
KR960036009A (ko
Inventor
마사토시 아까가와
Original Assignee
모기 쥰이찌
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=26406746&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR100216642(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 모기 쥰이찌, 신꼬오덴기 고교 가부시키가이샤 filed Critical 모기 쥰이찌
Publication of KR960036009A publication Critical patent/KR960036009A/ko
Application granted granted Critical
Publication of KR100216642B1 publication Critical patent/KR100216642B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019960007924A 1995-03-24 1996-03-22 반도체장치 및 그 제조방법 KR100216642B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP6560795 1995-03-24
JP95-065607 1995-03-24
JP25986195A JP3356921B2 (ja) 1995-03-24 1995-10-06 半導体装置およびその製造方法
JP95-259861 1995-10-06

Publications (2)

Publication Number Publication Date
KR960036009A KR960036009A (ko) 1996-10-28
KR100216642B1 true KR100216642B1 (ko) 1999-09-01

Family

ID=26406746

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960007924A KR100216642B1 (ko) 1995-03-24 1996-03-22 반도체장치 및 그 제조방법

Country Status (2)

Country Link
JP (1) JP3356921B2 (ja)
KR (1) KR100216642B1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100746862B1 (ko) 2000-04-19 2007-08-07 도요 고한 가부시키가이샤 반도체 장치 및 그 제조방법

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW448524B (en) 1997-01-17 2001-08-01 Seiko Epson Corp Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
EP1447849A3 (en) 1997-03-10 2005-07-20 Seiko Epson Corporation Semiconductor device and circuit board having the same mounted thereon
JP3335575B2 (ja) 1997-06-06 2002-10-21 松下電器産業株式会社 半導体装置およびその製造方法
JP3068534B2 (ja) * 1997-10-14 2000-07-24 九州日本電気株式会社 半導体装置
US6441487B2 (en) * 1997-10-20 2002-08-27 Flip Chip Technologies, L.L.C. Chip scale package using large ductile solder balls
CA2301083A1 (en) * 1998-06-12 1999-12-16 Hitachi, Ltd. Semiconductor device and method for manufacturing the same
US6903451B1 (en) 1998-08-28 2005-06-07 Samsung Electronics Co., Ltd. Chip scale packages manufactured at wafer level
US6656828B1 (en) 1999-01-22 2003-12-02 Hitachi, Ltd. Method of forming bump electrodes
KR100526061B1 (ko) * 1999-03-10 2005-11-08 삼성전자주식회사 웨이퍼 상태에서의 칩 스케일 패키지 제조 방법
JP4024958B2 (ja) * 1999-03-15 2007-12-19 株式会社ルネサステクノロジ 半導体装置および半導体実装構造体
JP3450238B2 (ja) 1999-11-04 2003-09-22 Ｎｅｃエレクトロニクス株式会社 半導体装置及びその製造方法
JP2001196381A (ja) * 2000-01-12 2001-07-19 Toyo Kohan Co Ltd 半導体装置、半導体上の回路形成に用いる金属積層板、および回路形成方法
WO2001063991A1 (fr) 2000-02-25 2001-08-30 Ibiden Co., Ltd. Carte a circuits imprimes multicouche et procede de production d'une carte a circuits imprimes multicouche
JP2001308092A (ja) * 2000-04-18 2001-11-02 Toyo Kohan Co Ltd 半導体ウェハ上の配線形成に用いる金属積層板、および半導体ウェハ上への配線形成方法
JP3879816B2 (ja) 2000-06-02 2007-02-14 セイコーエプソン株式会社 半導体装置及びその製造方法、積層型半導体装置、回路基板並びに電子機器
JP2002094082A (ja) 2000-07-11 2002-03-29 Seiko Epson Corp 光素子及びその製造方法並びに電子機器
EP1321980A4 (en) 2000-09-25 2007-04-04 Ibiden Co Ltd SEMICONDUCTOR ELEMENT, METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT, MULTILAYER PRINTED CIRCUIT BOARD, AND METHOD FOR MANUFACTURING MULTILAYER PRINTED CIRCUIT BOARD
JP3939504B2 (ja) * 2001-04-17 2007-07-04 カシオ計算機株式会社 半導体装置並びにその製造方法および実装構造
JP4217639B2 (ja) 2004-02-26 2009-02-04 新光電気工業株式会社 半導体装置の製造方法
JP4265575B2 (ja) 2005-06-21 2009-05-20 セイコーエプソン株式会社 半導体チップおよび電子機器
JP4238843B2 (ja) 2005-06-21 2009-03-18 セイコーエプソン株式会社 半導体チップ、半導体チップの製造方法および電子機器
JP5272331B2 (ja) * 2007-05-23 2013-08-28 株式会社デンソー 半導体装置
JP4607152B2 (ja) * 2007-07-09 2011-01-05 Ｏｋｉセミコンダクタ株式会社 半導体装置
US9704769B2 (en) 2014-02-27 2017-07-11 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming encapsulated wafer level chip scale package (EWLCSP)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100746862B1 (ko) 2000-04-19 2007-08-07 도요 고한 가부시키가이샤 반도체 장치 및 그 제조방법

Also Published As

Publication number Publication date
JPH08330313A (ja) 1996-12-13
JP3356921B2 (ja) 2002-12-16
KR960036009A (ko) 1996-10-28

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