KR0160563B1 - 동기형 반도체 기억 장치 및 그 판독 제어 방법 - Google Patents

동기형 반도체 기억 장치 및 그 판독 제어 방법 Download PDF

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Publication number
KR0160563B1
KR0160563B1 KR1019950010460A KR19950010460A KR0160563B1 KR 0160563 B1 KR0160563 B1 KR 0160563B1 KR 1019950010460 A KR1019950010460 A KR 1019950010460A KR 19950010460 A KR19950010460 A KR 19950010460A KR 0160563 B1 KR0160563 B1 KR 0160563B1
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KR
South Korea
Prior art keywords
memory cell
register
read
data
switch element
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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KR1019950010460A
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English (en)
Korean (ko)
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KR960006014A (ko
Inventor
요시히로 다케마에
Original Assignee
세키자와 다다시
후지쯔 가부시키가이샤
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Publication of KR960006014A publication Critical patent/KR960006014A/ko
Application granted granted Critical
Publication of KR0160563B1 publication Critical patent/KR0160563B1/ko
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Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

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  • Dram (AREA)
KR1019950010460A 1994-07-14 1995-04-29 동기형 반도체 기억 장치 및 그 판독 제어 방법 Expired - Lifetime KR0160563B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP94-161907 1994-07-14
JP16190794A JP3380050B2 (ja) 1994-07-14 1994-07-14 半導体記憶装置のデータ読み出し方法

Publications (2)

Publication Number Publication Date
KR960006014A KR960006014A (ko) 1996-02-23
KR0160563B1 true KR0160563B1 (ko) 1998-12-01

Family

ID=15744293

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950010460A Expired - Lifetime KR0160563B1 (ko) 1994-07-14 1995-04-29 동기형 반도체 기억 장치 및 그 판독 제어 방법

Country Status (4)

Country Link
US (1) US5568427A (enrdf_load_stackoverflow)
JP (1) JP3380050B2 (enrdf_load_stackoverflow)
KR (1) KR0160563B1 (enrdf_load_stackoverflow)
TW (1) TW275710B (enrdf_load_stackoverflow)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100203145B1 (ko) 1996-06-29 1999-06-15 김영환 반도체 메모리 소자의 뱅크 분산 방법
JP4057084B2 (ja) * 1996-12-26 2008-03-05 株式会社ルネサステクノロジ 半導体記憶装置
KR100247923B1 (ko) * 1997-01-29 2000-03-15 윤종용 스위치신호발생기및이를이용한고속동기형sram
JPH1139894A (ja) * 1997-07-23 1999-02-12 Sharp Corp クロック同期式読み出し専用メモリ
US5856947A (en) * 1997-08-27 1999-01-05 S3 Incorporated Integrated DRAM with high speed interleaving
CA2217375C (en) * 1997-09-30 2001-09-11 Valerie Lines Bi-directional data bus scheme with optimized read and write characteristics
JP3277860B2 (ja) * 1997-09-30 2002-04-22 日本電気株式会社 ロウバッファ内蔵半導体メモリ
JP3494346B2 (ja) * 1998-03-03 2004-02-09 シャープ株式会社 半導体記憶装置およびその制御方法
WO1999046775A2 (en) 1998-03-10 1999-09-16 Rambus, Inc. Performing concurrent refresh and current control operations in a memory subsystem
KR100305647B1 (ko) * 1998-05-27 2002-03-08 박종섭 동기식메모리장치
US5963481A (en) * 1998-06-30 1999-10-05 Enhanced Memory Systems, Inc. Embedded enhanced DRAM, and associated method
JP2000049305A (ja) * 1998-07-28 2000-02-18 Hitachi Ltd 半導体記憶装置
US6330636B1 (en) 1999-01-29 2001-12-11 Enhanced Memory Systems, Inc. Double data rate synchronous dynamic random access memory device incorporating a static RAM cache per memory bank
IT1318978B1 (it) * 2000-10-06 2003-09-19 St Microelectronics Srl Struttura di controllo e temporizzazione per una memoria

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6211977A (ja) * 1985-07-10 1987-01-20 Toshiba Corp 画像メモリ
US4980862A (en) * 1987-11-10 1990-12-25 Mosaid, Inc. Folded bitline dynamic ram with reduced shared supply voltages
DE69023556T2 (de) * 1989-06-26 1996-07-18 Nippon Electric Co Halbleiterspeicher mit einem verbesserten Datenleseschema.
JP3101298B2 (ja) * 1990-03-30 2000-10-23 株式会社東芝 半導体メモリ装置
US5241503A (en) * 1991-02-25 1993-08-31 Motorola, Inc. Dynamic random access memory with improved page-mode performance and method therefor having isolator between memory cells and sense amplifiers
JP3231842B2 (ja) * 1992-06-23 2001-11-26 株式会社 沖マイクロデザイン シリアルアクセスメモリ
KR100256120B1 (ko) * 1993-09-22 2000-05-15 김영환 고속 감지 증폭기

Also Published As

Publication number Publication date
KR960006014A (ko) 1996-02-23
TW275710B (enrdf_load_stackoverflow) 1996-05-11
JP3380050B2 (ja) 2003-02-24
US5568427A (en) 1996-10-22
JPH0831169A (ja) 1996-02-02

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