JPWO2025004919A5 - - Google Patents

Info

Publication number
JPWO2025004919A5
JPWO2025004919A5 JP2025529674A JP2025529674A JPWO2025004919A5 JP WO2025004919 A5 JPWO2025004919 A5 JP WO2025004919A5 JP 2025529674 A JP2025529674 A JP 2025529674A JP 2025529674 A JP2025529674 A JP 2025529674A JP WO2025004919 A5 JPWO2025004919 A5 JP WO2025004919A5
Authority
JP
Japan
Prior art keywords
electronic component
main surface
layer
disposed
composite
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025529674A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2025004919A1 (https=
Publication date
Application filed filed Critical
Priority claimed from PCT/JP2024/022172 external-priority patent/WO2025004919A1/ja
Publication of JPWO2025004919A1 publication Critical patent/JPWO2025004919A1/ja
Publication of JPWO2025004919A5 publication Critical patent/JPWO2025004919A5/ja
Pending legal-status Critical Current

Links

JP2025529674A 2023-06-26 2024-06-19 Pending JPWO2025004919A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023103878 2023-06-26
PCT/JP2024/022172 WO2025004919A1 (ja) 2023-06-26 2024-06-19 複合部品

Publications (2)

Publication Number Publication Date
JPWO2025004919A1 JPWO2025004919A1 (https=) 2025-01-02
JPWO2025004919A5 true JPWO2025004919A5 (https=) 2026-02-13

Family

ID=93939018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025529674A Pending JPWO2025004919A1 (https=) 2023-06-26 2024-06-19

Country Status (4)

Country Link
US (1) US20260011631A1 (https=)
JP (1) JPWO2025004919A1 (https=)
CN (1) CN120826780A (https=)
WO (1) WO2025004919A1 (https=)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5536980B2 (ja) * 2007-11-27 2014-07-02 パナソニック株式会社 実装方法
US9741649B2 (en) * 2014-06-04 2017-08-22 Invensas Corporation Integrated interposer solutions for 2D and 3D IC packaging
US11302592B2 (en) * 2017-03-08 2022-04-12 Mediatek Inc. Semiconductor package having a stiffener ring
US10242967B2 (en) * 2017-05-16 2019-03-26 Raytheon Company Die encapsulation in oxide bonded wafer stack
JP7242342B2 (ja) * 2019-02-22 2023-03-20 三菱重工業株式会社 マルチチップモジュール、電子機器およびマルチチップモジュールの製造方法

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