JPWO2024228284A5 - - Google Patents

Info

Publication number
JPWO2024228284A5
JPWO2024228284A5 JP2025518099A JP2025518099A JPWO2024228284A5 JP WO2024228284 A5 JPWO2024228284 A5 JP WO2024228284A5 JP 2025518099 A JP2025518099 A JP 2025518099A JP 2025518099 A JP2025518099 A JP 2025518099A JP WO2024228284 A5 JPWO2024228284 A5 JP WO2024228284A5
Authority
JP
Japan
Prior art keywords
wiring board
conductor
insulating film
conductor pattern
metal element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025518099A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2024228284A1 (https=
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/JP2024/004285 external-priority patent/WO2024228284A1/ja
Publication of JPWO2024228284A1 publication Critical patent/JPWO2024228284A1/ja
Publication of JPWO2024228284A5 publication Critical patent/JPWO2024228284A5/ja
Pending legal-status Critical Current

Links

JP2025518099A 2023-05-01 2024-02-08 Pending JPWO2024228284A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023075390 2023-05-01
PCT/JP2024/004285 WO2024228284A1 (ja) 2023-05-01 2024-02-08 配線基板、電子モジュール、及び配線基板の製造方法

Publications (2)

Publication Number Publication Date
JPWO2024228284A1 JPWO2024228284A1 (https=) 2024-11-07
JPWO2024228284A5 true JPWO2024228284A5 (https=) 2025-08-29

Family

ID=93332966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025518099A Pending JPWO2024228284A1 (https=) 2023-05-01 2024-02-08

Country Status (4)

Country Link
US (1) US20260053022A1 (https=)
JP (1) JPWO2024228284A1 (https=)
CN (1) CN120981913A (https=)
WO (1) WO2024228284A1 (https=)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001257453A (ja) * 2000-03-09 2001-09-21 Shinko Electric Ind Co Ltd 配線基板、半導体装置及びそれらの製造方法
JP2003133711A (ja) * 2001-10-23 2003-05-09 Matsushita Electric Ind Co Ltd プリント配線板とその製造方法および電子部品の実装方法
WO2009133886A1 (ja) * 2008-04-28 2009-11-05 日本電気株式会社 多層配線基板、及びその製造方法
JP5261756B1 (ja) * 2012-03-30 2013-08-14 株式会社フジクラ 多層配線基板
JP2017107934A (ja) * 2015-12-08 2017-06-15 富士通株式会社 回路基板、電子機器、及び回路基板の製造方法
JP7253946B2 (ja) * 2019-03-20 2023-04-07 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
US11688693B2 (en) * 2019-10-29 2023-06-27 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor packages and method of manufacture

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