JPWO2023100808A5 - - Google Patents

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Publication number
JPWO2023100808A5
JPWO2023100808A5 JP2023564963A JP2023564963A JPWO2023100808A5 JP WO2023100808 A5 JPWO2023100808 A5 JP WO2023100808A5 JP 2023564963 A JP2023564963 A JP 2023564963A JP 2023564963 A JP2023564963 A JP 2023564963A JP WO2023100808 A5 JPWO2023100808 A5 JP WO2023100808A5
Authority
JP
Japan
Prior art keywords
electrode plate
side electrode
surface side
insulating layer
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2023564963A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2023100808A1 (https=
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/JP2022/043766 external-priority patent/WO2023100808A1/ja
Publication of JPWO2023100808A1 publication Critical patent/JPWO2023100808A1/ja
Publication of JPWO2023100808A5 publication Critical patent/JPWO2023100808A5/ja
Pending legal-status Critical Current

Links

JP2023564963A 2021-12-01 2022-11-28 Pending JPWO2023100808A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021195484 2021-12-01
PCT/JP2022/043766 WO2023100808A1 (ja) 2021-12-01 2022-11-28 絶縁チップおよび信号伝達装置

Publications (2)

Publication Number Publication Date
JPWO2023100808A1 JPWO2023100808A1 (https=) 2023-06-08
JPWO2023100808A5 true JPWO2023100808A5 (https=) 2024-08-16

Family

ID=86612207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023564963A Pending JPWO2023100808A1 (https=) 2021-12-01 2022-11-28

Country Status (5)

Country Link
US (1) US20240313043A1 (https=)
JP (1) JPWO2023100808A1 (https=)
CN (1) CN118339655A (https=)
DE (1) DE112022005675B4 (https=)
WO (1) WO2023100808A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025094846A1 (ja) * 2023-11-01 2025-05-08 ローム株式会社 半導体装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3992442B2 (ja) * 2001-02-05 2007-10-17 株式会社日立製作所 インタフェース装置及びインターフェースシステム
JP3839267B2 (ja) * 2001-03-08 2006-11-01 株式会社ルネサステクノロジ 半導体装置及びそれを用いた通信端末装置
US8330251B2 (en) * 2006-06-26 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device structure for reducing mismatch effects
JP6591637B2 (ja) 2013-11-13 2019-10-16 ローム株式会社 半導体装置および半導体モジュール
JP6395304B2 (ja) * 2013-11-13 2018-09-26 ローム株式会社 半導体装置および半導体モジュール
JP7023814B2 (ja) * 2018-08-29 2022-02-22 株式会社東芝 アイソレータ及び通信システム
JP7323343B2 (ja) * 2019-06-17 2023-08-08 ローム株式会社 チップ部品

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