JPWO2021229734A5 - - Google Patents

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Publication number
JPWO2021229734A5
JPWO2021229734A5 JP2022522420A JP2022522420A JPWO2021229734A5 JP WO2021229734 A5 JPWO2021229734 A5 JP WO2021229734A5 JP 2022522420 A JP2022522420 A JP 2022522420A JP 2022522420 A JP2022522420 A JP 2022522420A JP WO2021229734 A5 JPWO2021229734 A5 JP WO2021229734A5
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JP
Japan
Prior art keywords
substrate
semiconductor device
semiconductor
layer
bonding
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JP2022522420A
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English (en)
Japanese (ja)
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JPWO2021229734A1 (https=
JP7325624B2 (ja
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Priority claimed from PCT/JP2020/019180 external-priority patent/WO2021229734A1/ja
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JP2022522420A 2020-05-14 2020-05-14 半導体装置および半導体装置の製造方法 Active JP7325624B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/019180 WO2021229734A1 (ja) 2020-05-14 2020-05-14 半導体装置および半導体装置の製造方法

Publications (3)

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JPWO2021229734A1 JPWO2021229734A1 (https=) 2021-11-18
JPWO2021229734A5 true JPWO2021229734A5 (https=) 2022-08-10
JP7325624B2 JP7325624B2 (ja) 2023-08-14

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JP2022522420A Active JP7325624B2 (ja) 2020-05-14 2020-05-14 半導体装置および半導体装置の製造方法

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US (1) US12512648B2 (https=)
JP (1) JP7325624B2 (https=)
GB (1) GB2609786B (https=)
WO (1) WO2021229734A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023170449A (ja) * 2022-05-19 2023-12-01 浜松ホトニクス株式会社 接合方法、半導体デバイスの製造方法及び半導体デバイス
WO2025017863A1 (ja) * 2023-07-19 2025-01-23 三菱電機株式会社 半導体装置および半導体装置の製造方法
JP2025084380A (ja) * 2023-11-22 2025-06-03 住友金属鉱山株式会社 接合半導体基板および接合半導体基板の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0963912A (ja) * 1995-08-18 1997-03-07 Hoya Corp 貼り合わせ基板製造方法
US7799675B2 (en) * 2003-06-24 2010-09-21 Sang-Yun Lee Bonded semiconductor structure and method of fabricating the same
JP2008022866A (ja) 2004-10-28 2008-02-07 Stream Co Ltd 彫刻真珠及びその加飾方法
JP4650224B2 (ja) 2004-11-19 2011-03-16 日亜化学工業株式会社 電界効果トランジスタ
US20080026248A1 (en) * 2006-01-27 2008-01-31 Shekar Balagopal Environmental and Thermal Barrier Coating to Provide Protection in Various Environments
JP2012099710A (ja) * 2010-11-04 2012-05-24 Ushio Inc 基板と結晶層の接着方法および接着されたワーク
JP6245791B2 (ja) * 2012-03-27 2017-12-13 日亜化学工業株式会社 縦型窒化物半導体素子およびその製造方法
KR20140012445A (ko) 2012-07-20 2014-02-03 삼성전자주식회사 질화물계 반도체 소자 및 이의 제조방법
FR3040108B1 (fr) * 2015-08-12 2017-08-11 Commissariat Energie Atomique Procede de fabrication d'une structure semi-conductrice avec collage direct temporaire exploitant une couche poreuse
JP2017139322A (ja) * 2016-02-03 2017-08-10 旭硝子株式会社 デバイス基板の製造方法、及び積層体
JP6431013B2 (ja) * 2016-09-21 2018-11-28 シャープ株式会社 窒化アルミニウム系半導体深紫外発光素子
US10074567B2 (en) * 2016-10-21 2018-09-11 QROMIS, Inc. Method and system for vertical integration of elemental and compound semiconductors

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