GB2609786B - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Semiconductor device and method of manufacturing semiconductor device Download PDF

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Publication number
GB2609786B
GB2609786B GB2215350.6A GB202215350A GB2609786B GB 2609786 B GB2609786 B GB 2609786B GB 202215350 A GB202215350 A GB 202215350A GB 2609786 B GB2609786 B GB 2609786B
Authority
GB
United Kingdom
Prior art keywords
semiconductor device
manufacturing
manufacturing semiconductor
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2215350.6A
Other languages
English (en)
Other versions
GB202215350D0 (en
GB2609786A (en
Inventor
Nishimura Shinya
Hiza Shuichi
nishimura Kunihiko
Yagyu Eiji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of GB202215350D0 publication Critical patent/GB202215350D0/en
Publication of GB2609786A publication Critical patent/GB2609786A/en
Application granted granted Critical
Publication of GB2609786B publication Critical patent/GB2609786B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
    • H01S5/32341—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/021—Silicon based substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0217—Removal of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/11—Separation of active layers from substrates

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Recrystallisation Techniques (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)
GB2215350.6A 2020-05-14 2020-05-14 Semiconductor device and method of manufacturing semiconductor device Active GB2609786B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/019180 WO2021229734A1 (ja) 2020-05-14 2020-05-14 半導体装置および半導体装置の製造方法

Publications (3)

Publication Number Publication Date
GB202215350D0 GB202215350D0 (en) 2022-11-30
GB2609786A GB2609786A (en) 2023-02-15
GB2609786B true GB2609786B (en) 2025-05-14

Family

ID=78525514

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2215350.6A Active GB2609786B (en) 2020-05-14 2020-05-14 Semiconductor device and method of manufacturing semiconductor device

Country Status (4)

Country Link
US (1) US12512648B2 (https=)
JP (1) JP7325624B2 (https=)
GB (1) GB2609786B (https=)
WO (1) WO2021229734A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023170449A (ja) * 2022-05-19 2023-12-01 浜松ホトニクス株式会社 接合方法、半導体デバイスの製造方法及び半導体デバイス
WO2025017863A1 (ja) * 2023-07-19 2025-01-23 三菱電機株式会社 半導体装置および半導体装置の製造方法
JP2025084380A (ja) * 2023-11-22 2025-06-03 住友金属鉱山株式会社 接合半導体基板および接合半導体基板の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0963912A (ja) * 1995-08-18 1997-03-07 Hoya Corp 貼り合わせ基板製造方法
JP2012099710A (ja) * 2010-11-04 2012-05-24 Ushio Inc 基板と結晶層の接着方法および接着されたワーク
JP2017139322A (ja) * 2016-02-03 2017-08-10 旭硝子株式会社 デバイス基板の製造方法、及び積層体

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7799675B2 (en) * 2003-06-24 2010-09-21 Sang-Yun Lee Bonded semiconductor structure and method of fabricating the same
JP2008022866A (ja) 2004-10-28 2008-02-07 Stream Co Ltd 彫刻真珠及びその加飾方法
JP4650224B2 (ja) 2004-11-19 2011-03-16 日亜化学工業株式会社 電界効果トランジスタ
US20080026248A1 (en) * 2006-01-27 2008-01-31 Shekar Balagopal Environmental and Thermal Barrier Coating to Provide Protection in Various Environments
JP6245791B2 (ja) * 2012-03-27 2017-12-13 日亜化学工業株式会社 縦型窒化物半導体素子およびその製造方法
KR20140012445A (ko) 2012-07-20 2014-02-03 삼성전자주식회사 질화물계 반도체 소자 및 이의 제조방법
FR3040108B1 (fr) * 2015-08-12 2017-08-11 Commissariat Energie Atomique Procede de fabrication d'une structure semi-conductrice avec collage direct temporaire exploitant une couche poreuse
JP6431013B2 (ja) * 2016-09-21 2018-11-28 シャープ株式会社 窒化アルミニウム系半導体深紫外発光素子
US10074567B2 (en) * 2016-10-21 2018-09-11 QROMIS, Inc. Method and system for vertical integration of elemental and compound semiconductors

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0963912A (ja) * 1995-08-18 1997-03-07 Hoya Corp 貼り合わせ基板製造方法
JP2012099710A (ja) * 2010-11-04 2012-05-24 Ushio Inc 基板と結晶層の接着方法および接着されたワーク
JP2017139322A (ja) * 2016-02-03 2017-08-10 旭硝子株式会社 デバイス基板の製造方法、及び積層体

Also Published As

Publication number Publication date
GB202215350D0 (en) 2022-11-30
GB2609786A (en) 2023-02-15
JPWO2021229734A1 (https=) 2021-11-18
US12512648B2 (en) 2025-12-30
US20230155351A1 (en) 2023-05-18
WO2021229734A1 (ja) 2021-11-18
JP7325624B2 (ja) 2023-08-14

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