SG11202012288PA - Semiconductor device and method of manufacturing same - Google Patents
Semiconductor device and method of manufacturing sameInfo
- Publication number
- SG11202012288PA SG11202012288PA SG11202012288PA SG11202012288PA SG11202012288PA SG 11202012288P A SG11202012288P A SG 11202012288PA SG 11202012288P A SG11202012288P A SG 11202012288PA SG 11202012288P A SG11202012288P A SG 11202012288PA SG 11202012288P A SG11202012288P A SG 11202012288PA
- Authority
- SG
- Singapore
- Prior art keywords
- semiconductor device
- manufacturing same
- manufacturing
- same
- semiconductor
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08135—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/08145—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/802—Applying energy for connecting
- H01L2224/80201—Compression bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8034—Bonding interfaces of the bonding area
- H01L2224/80357—Bonding interfaces of the bonding area being flush with the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
- H01L2224/80896—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces between electrically insulating surfaces, e.g. oxide or nitride layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80909—Post-treatment of the bonding area
- H01L2224/80948—Thermal treatments, e.g. annealing, controlled cooling
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/80986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2018/031321 WO2020039574A1 (en) | 2018-08-24 | 2018-08-24 | Semiconductor device and method for manufacturing same |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11202012288PA true SG11202012288PA (en) | 2021-01-28 |
Family
ID=69591992
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11202012288PA SG11202012288PA (en) | 2018-08-24 | 2018-08-24 | Semiconductor device and method of manufacturing same |
Country Status (5)
Country | Link |
---|---|
US (1) | US11587871B2 (en) |
CN (1) | CN112292757B (en) |
SG (1) | SG11202012288PA (en) |
TW (1) | TWI721316B (en) |
WO (1) | WO2020039574A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220056549A (en) * | 2020-10-28 | 2022-05-06 | 삼성전자주식회사 | Semiconductor devices having peripheral circuit regions on both sides of a substrate and data storage systems including the same |
JP2022095359A (en) * | 2020-12-16 | 2022-06-28 | キオクシア株式会社 | Semiconductor device and method for manufacturing the same |
KR20220119821A (en) | 2021-02-22 | 2022-08-30 | 삼성전자주식회사 | Semiconductor devices |
JP2022142642A (en) * | 2021-03-16 | 2022-09-30 | キオクシア株式会社 | Semiconductor device |
JP2022191901A (en) * | 2021-06-16 | 2022-12-28 | キオクシア株式会社 | Semiconductor device and method for manufacturing the same |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0684908A (en) * | 1992-09-02 | 1994-03-25 | Nec Corp | Semiconductor device and its manufacturing method |
JPH09283617A (en) | 1996-04-15 | 1997-10-31 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
JPH1174345A (en) * | 1997-08-27 | 1999-03-16 | Sony Corp | Semiconductor device and manufacture thereof |
JP3403052B2 (en) * | 1998-02-10 | 2003-05-06 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
JP2001345378A (en) * | 2000-05-31 | 2001-12-14 | Toshiba Corp | Semiconductor device and method of manufacturing the same |
JP3418615B2 (en) * | 2001-06-12 | 2003-06-23 | 沖電気工業株式会社 | Semiconductor device and method of manufacturing the same |
JP4063619B2 (en) | 2002-03-13 | 2008-03-19 | Necエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
JP4387654B2 (en) * | 2002-10-10 | 2009-12-16 | パナソニック株式会社 | Semiconductor device and manufacturing method thereof |
JP4056854B2 (en) * | 2002-11-05 | 2008-03-05 | 新光電気工業株式会社 | Manufacturing method of semiconductor device |
JP2004297019A (en) * | 2003-03-28 | 2004-10-21 | Seiko Epson Corp | Semiconductor device, circuit board, and electronic apparatus |
KR100689665B1 (en) * | 2003-11-06 | 2007-03-08 | 삼성전자주식회사 | Method for manufacturing an inductor for a System On Chip |
JP2007115980A (en) * | 2005-10-21 | 2007-05-10 | Toshiba Corp | Semiconductor device and manufacturing method therefor |
JP4573784B2 (en) * | 2006-03-08 | 2010-11-04 | Okiセミコンダクタ株式会社 | Manufacturing method of semiconductor device |
JP2008159651A (en) * | 2006-12-21 | 2008-07-10 | Elpida Memory Inc | Multilayer wiring, laminated aluminum wiring, semiconductor device, and method for manufacturing the same |
JP5106933B2 (en) * | 2007-07-04 | 2012-12-26 | ラピスセミコンダクタ株式会社 | Semiconductor device |
JP5596260B2 (en) * | 2007-07-27 | 2014-09-24 | ピーエスフォー ルクスコ エスエイアールエル | Semiconductor device and manufacturing method thereof |
JP2009141064A (en) * | 2007-12-05 | 2009-06-25 | Renesas Technology Corp | Semiconductor device |
JP5376916B2 (en) | 2008-11-26 | 2013-12-25 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
JP5985136B2 (en) * | 2009-03-19 | 2016-09-06 | ソニー株式会社 | SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE |
JP5553693B2 (en) * | 2010-06-30 | 2014-07-16 | キヤノン株式会社 | Solid-state imaging device and imaging system |
JP2012060035A (en) * | 2010-09-10 | 2012-03-22 | Toshiba Corp | Semiconductor device and method of manufacturing the same |
JP2012146861A (en) * | 2011-01-13 | 2012-08-02 | Toshiba Corp | Semiconductor memory device |
US20130154112A1 (en) * | 2011-12-16 | 2013-06-20 | Katholieke Universiteit Leuven, K.U. Leuven R&D | Method for Forming Isolation Trenches in Micro-Bump Interconnect Structures and Devices Obtained Thereof |
US8710607B2 (en) * | 2012-07-12 | 2014-04-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and apparatus for image sensor packaging |
JP6203525B2 (en) | 2013-04-19 | 2017-09-27 | 関東化學株式会社 | Cleaning liquid composition |
TWI676279B (en) * | 2013-10-04 | 2019-11-01 | 新力股份有限公司 | Semiconductor device and solid-state imaging device |
JP6203152B2 (en) * | 2014-09-12 | 2017-09-27 | 東芝メモリ株式会社 | Manufacturing method of semiconductor memory device |
US9397045B2 (en) * | 2014-10-16 | 2016-07-19 | Taiwan Semiconductor Manufacturing Co., Ltd | Structure and formation method of damascene structure |
US9911693B2 (en) * | 2015-08-28 | 2018-03-06 | Micron Technology, Inc. | Semiconductor devices including conductive lines and methods of forming the semiconductor devices |
US10217670B2 (en) | 2016-09-07 | 2019-02-26 | Tokyo Electron Limited | Wrap-around contact integration scheme |
US11158571B2 (en) * | 2018-12-20 | 2021-10-26 | Micron Technology, Inc. | Devices including conductive interconnect structures, related electronic systems, and related methods |
CN112234077B (en) * | 2019-07-15 | 2024-03-22 | 联华电子股份有限公司 | Magnetic memory cell and method of making the same |
-
2018
- 2018-08-24 SG SG11202012288PA patent/SG11202012288PA/en unknown
- 2018-08-24 WO PCT/JP2018/031321 patent/WO2020039574A1/en active Application Filing
- 2018-08-24 CN CN201880094521.4A patent/CN112292757B/en active Active
- 2018-09-06 TW TW107131237A patent/TWI721316B/en active
-
2020
- 2020-12-09 US US17/116,158 patent/US11587871B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
WO2020039574A1 (en) | 2020-02-27 |
TW202010107A (en) | 2020-03-01 |
CN112292757A (en) | 2021-01-29 |
CN112292757B (en) | 2024-03-05 |
TWI721316B (en) | 2021-03-11 |
US20210091001A1 (en) | 2021-03-25 |
US11587871B2 (en) | 2023-02-21 |
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