JPWO2019230292A1 - 半導体装置 - Google Patents
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- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
- Geometry (AREA)
- Inverter Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Power Conversion In General (AREA)
Abstract
Description
特許文献1 特表2016−9496号公報
図2は、第1実施例に係る半導体装置100の平面図の一例である。同図は、ケース部110の内部において、ベース部120上に設けられた内部回路の配置例を示す。本例の内部回路は、3レベル電力変換装置(インバータ)回路であるが、内部回路はこれに限定されない。
図11は、第2実施例に係る内部回路の配置例を示す。本例の内部回路は、ダイオードD1およびD2を備えない。また、ブロック間接続部と、ブロック内接続部の配置が図2から図10に示した第1実施例と異なる。他の構造は、第1実施例と同様である。
Claims (9)
- 並列に接続された複数の第1回路部を有する第1回路ブロックと、
並列に接続された複数の第2回路部を有する第2回路ブロックと、
前記第1回路ブロックと前記第2回路ブロックとを電気的に接続するブロック間接続部と
を備え、
前記ブロック間接続部は、前記第1回路ブロックから、前記第2回路ブロックにおいて最も前記第1回路ブロックの近くに配置された第2回路部までの電流経路における抵抗値を増大させる抵抗調整部を有する半導体装置。 - 前記複数の第1回路部は、第1方向に並んで配置されており、
前記複数の第2回路部は、前記第1方向に並んで配置されており、
前記第1回路ブロックおよび前記第2回路ブロックは、前記第1方向に並んで配置されている
請求項1に記載の半導体装置。 - 前記抵抗調整部は、前記第2回路ブロックから、前記第1回路ブロックにおいて最も前記第2回路ブロックの近くに配置された第1回路部までの電流経路における抵抗値を増大させる
請求項2に記載の半導体装置。 - 前記ブロック間接続部は、板状部分を有しており、
前記抵抗調整部は、前記板状部分に設けられたスリットである
請求項2または3に記載の半導体装置。 - 前記ブロック間接続部は、
第1回路部毎に設けられ、前記板状部分の端辺から突出して前記第1回路部と接続する第1接続端部と、
第2回路部毎に設けられ、前記板状部分の前記端辺から突出して前記第2回路部と接続する第2接続端部と
を有し、
前記抵抗調整部は、
前記板状部分の前記端辺において、最も前記第2接続端部側に配置された前記第1接続端部と、最も前記第1接続端部側に配置された前記第2接続端部との間に設けられ、前記端辺から前記板状部分の内部まで延伸する端辺スリットと、
前記板状部分において前記端辺スリットに接続して設けられ、前記端辺に沿って前記第1接続端部側に延伸する第1内部スリットと、
前記板状部分において前記端辺スリットに接続して設けられ、前記端辺に沿って前記第2接続端部側に延伸する第2内部スリットと
を有する請求項4に記載の半導体装置。 - 前記第1内部スリットは、少なくとも一つの前記第1接続端部よりも外側まで延伸して設けられており、
前記第2内部スリットは、少なくとも一つの前記第2接続端部よりも外側まで延伸して設けられている
請求項5に記載の半導体装置。 - 前記第1方向と垂直な第2方向において前記第2回路ブロックと並んで配置され、前記第2回路ブロックと電気的に接続された第3回路ブロックと、
前記第2方向において前記第1回路ブロックと並んで配置され、且つ、前記第1方向において前記第3回路ブロックと並んで配置され、前記第1回路ブロックと電気的に接続された第4回路ブロックと
を備え、
前記第3回路ブロックは、電気的に並列に接続され、且つ、前記第1方向に並んで配置された複数の第3回路部を有し、
前記第4回路ブロックは、電気的に並列に接続され、且つ、前記第1方向に並んで配置された複数の第4回路部を有する
請求項2から6のいずれか一項に記載の半導体装置。 - 前記第3回路ブロックに電気的に接続された第1ブロック内接続部を備え、
前記第1ブロック内接続部は、
スリットが設けられた板状部分と、
前記板状部分から突出して設けられた外部接続端部と、
第3回路部毎に設けられ、前記板状部分の端辺から突出して前記第3回路部と接続する第3接続端部と
を有し、
前記第3接続端部のうち最も前記第4回路ブロック側に配置された第3接続端部と、前記外部接続端部とを結ぶ直線を横切るように、前記スリットが設けられている
請求項7に記載の半導体装置。 - 前記第4回路ブロックに電気的に接続された第2ブロック内接続部を備え、
前記第2ブロック内接続部は、
板状部分と、
前記板状部分から突出して設けられた外部接続端部と、
第4回路部毎に設けられ、前記板状部分の端辺から突出して前記第4回路部と接続する第4接続端部と
を有し、
前記第1ブロック内接続部の前記外部接続端部は、前記板状部分における前記第1方向の中央よりも前記第4回路ブロック側に配置されており、
前記第2ブロック内接続部の前記外部接続端部は、前記板状部分における前記第1方向の中央よりも前記第3回路ブロックとは逆側に配置されており、
前記第2ブロック内接続部の前記板状部分には、それぞれの前記第4接続端部と、前記外部接続端部とを結ぶ各直線を横切るスリットが設けられていない
請求項8に記載の半導体装置。
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JP2018106515 | 2018-06-01 | ||
JP2018106515 | 2018-06-01 | ||
PCT/JP2019/017815 WO2019230292A1 (ja) | 2018-06-01 | 2019-04-25 | 半導体装置 |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2000060126A (ja) * | 1998-08-11 | 2000-02-25 | Hitachi Ltd | 電力変換器の主回路構造 |
JP2002125381A (ja) * | 2000-10-13 | 2002-04-26 | Mitsubishi Electric Corp | 電力変換装置 |
JP2002353407A (ja) * | 2001-05-30 | 2002-12-06 | Fuji Electric Co Ltd | 半導体素子の並列接続用導体 |
WO2013179547A1 (ja) * | 2012-06-01 | 2013-12-05 | パナソニック株式会社 | パワー半導体装置 |
JP2017118816A (ja) * | 2013-02-06 | 2017-06-29 | 富士電機株式会社 | 半導体装置 |
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JPH07249735A (ja) | 1994-03-08 | 1995-09-26 | Hitachi Ltd | 半導体素子の並列接続方法 |
JP3269745B2 (ja) | 1995-01-17 | 2002-04-02 | 株式会社日立製作所 | モジュール型半導体装置 |
US8330489B2 (en) * | 2009-04-28 | 2012-12-11 | International Business Machines Corporation | Universal inter-layer interconnect for multi-layer semiconductor stacks |
US8785246B2 (en) * | 2012-08-03 | 2014-07-22 | Plx Technology, Inc. | Multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits |
WO2014192118A1 (ja) | 2013-05-30 | 2014-12-04 | 三菱電機株式会社 | 半導体装置 |
CN105981274B (zh) * | 2014-02-11 | 2018-11-06 | 三菱电机株式会社 | 电力用半导体模块 |
KR101629961B1 (ko) | 2014-06-20 | 2016-06-13 | 네이버 주식회사 | 온라인 대화를 이용한 거래 방법 및 시스템 |
JP6405383B2 (ja) | 2014-07-15 | 2018-10-17 | 株式会社日立製作所 | パワートランジスタモジュール |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2000060126A (ja) * | 1998-08-11 | 2000-02-25 | Hitachi Ltd | 電力変換器の主回路構造 |
JP2002125381A (ja) * | 2000-10-13 | 2002-04-26 | Mitsubishi Electric Corp | 電力変換装置 |
JP2002353407A (ja) * | 2001-05-30 | 2002-12-06 | Fuji Electric Co Ltd | 半導体素子の並列接続用導体 |
WO2013179547A1 (ja) * | 2012-06-01 | 2013-12-05 | パナソニック株式会社 | パワー半導体装置 |
JP2017118816A (ja) * | 2013-02-06 | 2017-06-29 | 富士電機株式会社 | 半導体装置 |
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JP7060094B2 (ja) | 2022-04-26 |
CN111386604B (zh) | 2023-12-19 |
CN111386604A (zh) | 2020-07-07 |
US11373988B2 (en) | 2022-06-28 |
DE112019000178T5 (de) | 2020-09-03 |
US20200286877A1 (en) | 2020-09-10 |
WO2019230292A1 (ja) | 2019-12-05 |
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