JPWO2019217611A5 - - Google Patents

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Publication number
JPWO2019217611A5
JPWO2019217611A5 JP2020563502A JP2020563502A JPWO2019217611A5 JP WO2019217611 A5 JPWO2019217611 A5 JP WO2019217611A5 JP 2020563502 A JP2020563502 A JP 2020563502A JP 2020563502 A JP2020563502 A JP 2020563502A JP WO2019217611 A5 JPWO2019217611 A5 JP WO2019217611A5
Authority
JP
Japan
Prior art keywords
integrated circuit
layer
dielectric layer
silicon dioxide
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2020563502A
Other languages
English (en)
Japanese (ja)
Other versions
JP2021524998A (ja
JP2021524998A5 (https=
Publication date
Priority claimed from US15/977,712 external-priority patent/US10622073B2/en
Application filed filed Critical
Publication of JP2021524998A publication Critical patent/JP2021524998A/ja
Publication of JPWO2019217611A5 publication Critical patent/JPWO2019217611A5/ja
Publication of JP2021524998A5 publication Critical patent/JP2021524998A5/ja
Priority to JP2025107196A priority Critical patent/JP2025123554A/ja
Pending legal-status Critical Current

Links

JP2020563502A 2018-05-11 2019-05-09 垂直コンデンサを含む集積回路 Pending JP2021524998A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025107196A JP2025123554A (ja) 2018-05-11 2025-06-25 垂直コンデンサを含む集積回路

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/977,712 US10622073B2 (en) 2018-05-11 2018-05-11 Integrated circuit including vertical capacitors
US15/977,712 2018-05-11
PCT/US2019/031417 WO2019217611A1 (en) 2018-05-11 2019-05-09 Integrated circuit including vertical capacitors

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025107196A Division JP2025123554A (ja) 2018-05-11 2025-06-25 垂直コンデンサを含む集積回路

Publications (3)

Publication Number Publication Date
JP2021524998A JP2021524998A (ja) 2021-09-16
JPWO2019217611A5 true JPWO2019217611A5 (https=) 2022-05-24
JP2021524998A5 JP2021524998A5 (https=) 2022-05-24

Family

ID=68465262

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2020563502A Pending JP2021524998A (ja) 2018-05-11 2019-05-09 垂直コンデンサを含む集積回路
JP2025107196A Pending JP2025123554A (ja) 2018-05-11 2025-06-25 垂直コンデンサを含む集積回路

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025107196A Pending JP2025123554A (ja) 2018-05-11 2025-06-25 垂直コンデンサを含む集積回路

Country Status (5)

Country Link
US (2) US10622073B2 (https=)
EP (1) EP3791428A4 (https=)
JP (2) JP2021524998A (https=)
CN (1) CN112106195B (https=)
WO (1) WO2019217611A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102765313B1 (ko) * 2019-04-02 2025-02-07 삼성전자주식회사 수직 커패시터 구조 및 이를 포함하는 비휘발성 메모리 장치
CN111968983B (zh) * 2019-05-20 2023-10-17 联华电子股份有限公司 存储器元件的结构及其制造方法

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US6448615B1 (en) 1998-02-26 2002-09-10 Micron Technology, Inc. Methods, structures, and circuits for transistors with gate-to-body capacitive coupling
US6479341B1 (en) * 1998-03-02 2002-11-12 Vanguard International Semiconductor Corporation Capacitor over metal DRAM structure
KR100297712B1 (ko) * 1998-07-23 2001-08-07 윤종용 고집적화를위한불휘발성메모리및그제조방법
US6083790A (en) * 1999-02-11 2000-07-04 Taiwan Semiconductor Manufacturing Company Ltd. Method for making y-shaped multi-fin stacked capacitors for dynamic random access memory cells
US6518618B1 (en) * 1999-12-03 2003-02-11 Intel Corporation Integrated memory cell and method of fabrication
US6524926B1 (en) 2000-11-27 2003-02-25 Lsi Logic Corporation Metal-insulator-metal capacitor formed by damascene processes between metal interconnect layers and method of forming same
US7232717B1 (en) 2002-05-28 2007-06-19 O2Ic, Inc. Method of manufacturing non-volatile DRAM
US6888755B2 (en) * 2002-10-28 2005-05-03 Sandisk Corporation Flash memory cell arrays having dual control gates per memory cell charge storage element
ITTO20020997A1 (it) 2002-11-15 2004-05-16 St Microelectronics Srl Procedimento autoalllineato per la fabbricazione di
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EP2555241A1 (en) 2011-08-02 2013-02-06 Nxp B.V. IC die, semiconductor package, printed circuit board and IC die manufacturing method
US8780628B2 (en) * 2011-09-23 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit including a voltage divider and methods of operating the same
US8692306B2 (en) * 2012-01-05 2014-04-08 Taiwan Semiconductor Manufacturing Co., Ltd. Decoupling capacitor and method of making same
JP5936959B2 (ja) * 2012-09-04 2016-06-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8889484B2 (en) * 2012-10-02 2014-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for a component package
JP6133688B2 (ja) * 2013-05-27 2017-05-24 ルネサスエレクトロニクス株式会社 半導体装置
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