JPWO2019124024A1 - 半導体パッケージおよびその製造方法 - Google Patents
半導体パッケージおよびその製造方法 Download PDFInfo
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- JPWO2019124024A1 JPWO2019124024A1 JP2019560919A JP2019560919A JPWO2019124024A1 JP WO2019124024 A1 JPWO2019124024 A1 JP WO2019124024A1 JP 2019560919 A JP2019560919 A JP 2019560919A JP 2019560919 A JP2019560919 A JP 2019560919A JP WO2019124024 A1 JPWO2019124024 A1 JP WO2019124024A1
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- semiconductor package
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Abstract
Description
<装置構成>
図1は、本発明に係る実施の形態1における半導体パッケージ100の構成を示す断面図である。図1に示すように半導体パッケージ100は、半導体チップ11(第1の半導体チップ)および半導体チップ12(第2の半導体チップ)の主面が、それぞれヒートスプレッダ3(放熱部材)のダイボンド部21および22(第1および第2の接合部)上に接合層2を介してダイボンドされている。
次に、製造工程を順に示す断面図である図3〜図6を用いて、半導体パッケージ100の製造方法を説明する。
以上説明した実施の形態1の半導体パッケージ100に対しては、以下の適用が可能である。すなわち、半導体チップ11および12には、共に実験用のSi半導体装置が適用される例を示したが、これに限定されず、SiC(炭化珪素)半導体装置、GaN(窒化ガリウム)半導体装置、GaAs(ガリウムヒ素)半導体装置などを適用でき、Si半導体装置と同様の効果が得られる。
以上説明した実施の形態1の半導体パッケージ100においては、ヒートスプレッダ3の2つのダイボンド部間で高低差を有した段差構造とし、厚さの異なる半導体チップ11および12に対応していたが、厚さの異なる半導体チップに対して大きさの異なるインナーバンプを用いることによっても、厚さの違いに対応することができる。
実施の形態1の半導体パッケージ100においては、インターポーザ基板5上に配置するインナーバンプ41の高さによってヒートスプレッダ3とインターポーザ基板5との間のギャップ長が決まっていたが、ギャップ長設定のための支持体を設けても良い。
実施の形態1の半導体パッケージ100においては、インターポーザ基板5上に配置するインナーバンプ41によってヒートスプレッダ3を支えていたが、ヒートスプレッダ3を支えるための支持体を設けても良い。
実施の形態1の半導体パッケージ100においては、半導体チップ11および12で発生する熱を、主としてヒートスプレッダ3の上面から排熱していたが、インターポーザ基板5側に排熱するようにしても良い。
実施の形態1の半導体パッケージ100においては、ヒートスプレッダ3の上面は平坦であったが、上面に冷却フィンを設けても良い。
半導体チップの動作周波数が1GHzを超える領域では、半導体チップの能動面が比誘電率の大きい封止樹脂62で覆われると特性劣化を生じる可能性があり、能動面が封止樹脂62で覆われない構造が望ましい場合がある。そのために、インナーバンプ41の配列で封止樹脂62をせき止めて、インナーバンプ41の配列より内側まで封止樹脂62が流入しないようにしたり、封止樹脂62の粘度が常温で50Pa・S以上500Pa・S以下となるように粘度を高めに設定して、インナーバンプ41の配列より内側まで封止樹脂62が流入しないようにしたりして、能動面が封止樹脂62で覆われない構造を確保することが考えられる。
図1に示した実施の形態1の半導体パッケージ100の製造方法については図3〜図6を用いて説明し、半導体チップ11および12を接合した1個のヒートスプレッダ3を、1枚のインターポーザ基板5に搭載する製造方法を説明したが、1枚のインターポーザ基板に複数のヒートスプレッダ3を搭載可能な多面付け基板を使用し、最終的にはインターポーザ基板をヒートスプレッダ3ごとに個片化して、個々に独立した半導体パッケージを得るようにしても良い。
以上説明した実施の形態2の半導体パッケージの製造方法においては、個々に独立した複数のヒートスプレッダ3をイ多面付けインターポーザ基板50に搭載する例を示したが、複数のヒートスプレッダを厚さの薄い連結部で連結したヒートスプレッダを多面付けインターポーザ基板50に搭載し、最終的にヒートスプレッダとインターポーザ基板を個片化して、個々に独立した半導体パッケージを得るようにしても良い。
Claims (15)
- 絶縁基板と、
前記絶縁基板の第1の主面上に複数の第1の接合材を介して能動面が接合された第1の半導体チップと、
前記第1の主面上に複数の第2の接合材を介して能動面が接合された前記第1の半導体チップよりも厚さの薄い第2の半導体チップと、
前記第1の半導体チップの前記能動面および前記第2の半導体チップの前記能動面とは反対の主面が下面に接合された放熱部材と、
前記放熱部材の上面に乗り上げることなく前記放熱部材の側壁の少なくとも一部と接し、前記第1および第2の半導体チップを前記絶縁基板上に封止する封止樹脂と、を備え、
前記放熱部材は、
前記第1の半導体チップが接合された第1の接合部の厚さが、前記第2の半導体チップが接合された第2の接合部の厚さよりも薄い、半導体パッケージ。 - 絶縁基板と、
前記絶縁基板の第1の主面上に複数の第1の接合材を介して能動面が接合された第1の半導体チップと、
前記第1の主面上に複数の第2の接合材を介して能動面が接合された前記第1の半導体チップよりも厚さの薄い第2の半導体チップと、
前記第1の半導体チップの前記能動面および前記第2の半導体チップの前記能動面とは反対の主面が下面に接合された放熱部材と、
前記放熱部材の上面に乗り上げることなく前記放熱部材の側壁の少なくとも一部と接し、前記第1および第2の半導体チップを前記絶縁基板上に封止する封止樹脂と、を備え、
前記複数の第1の接合材の厚さが、前記複数の第2の接合材の厚さよりも薄い、半導体パッケージ。 - 前記絶縁基板の前記第1の主面の端縁部に設けられ、前記放熱部材の側壁との間に隙間を有するように前記第1の主面に対して垂直方向に延在する障壁を備え、
前記封止樹脂は、
前記隙間を満たすように充填されている、請求項1または請求項2記載の半導体パッケージ。 - 前記複数の第1の接合材の配列の外周および前記複数の第2の接合材の配列の外周に設けられた内部障壁を備え、
前記複数の第1の接合材の配列の内側および前記複数の第2の接合材の配列の内側に、前記第1および第2の半導体チップの前記能動面が前記封止樹脂で覆われない中空領域を有する、請求項1または請求項2記載の半導体パッケージ。 - 前記放熱部材は、
前記上面と前記下面との間を貫通する開口部を有する、請求項1または請求項2記載の半導体パッケージ。 - 前記開口部は、
前記放熱部材の前記第1および第2の半導体チップが配置された位置の間に設けられる、請求項5記載の半導体パッケージ。 - 前記放熱部材は、
前記下面から前記絶縁基板に向けて延在し、先端が前記絶縁基板の前記第1の主面に接する少なくとも1つの突起部を有する、請求項1または請求項2記載の半導体パッケージ。 - 前記放熱部材は、
前記下面から前記絶縁基板に向けて延在し、先端が前記絶縁基板を貫通する少なくとも1つの突起部を有する、請求項1または請求項2記載の半導体パッケージ。 - 前記放熱部材は、
前記上面に設けられた空冷フィンを有する、請求項1または請求項2記載の半導体パッケージ。 - (a)複数の半導体チップの能動面とは反対の主面が下面に接合された放熱部材を前記能動面が絶縁基板の第1の主面に面するように実装する工程と、
(b)前記絶縁基板の前記第1の主面の端縁部に設けられ、前記第1の主面に対して垂直方向に延在して前記放熱部材の側壁との間に隙間を設ける障壁を形成する工程と、
(c)前記障壁、前記絶縁基板および前記放熱部材で規定される領域内に封止樹脂を充填する工程と、を備え、
前記工程(b)は、
前記放熱部材の端縁部との間に隙間を有し、前記放熱部材の上面を越えない高さを有するように前記障壁を形成する工程を有し、
前記工程(c)は、
(c−1)前記放熱部材の前記上面に乗り上げることなく前記放熱部材の前記端縁部と前記障壁との間の前記隙間を満たすように前記封止樹脂を充填する工程を有する、半導体パッケージの製造方法。 - 前記放熱部材は、
前記上面と前記下面との間を貫通する開口部を有する、請求項10記載の半導体パッケージの製造方法。 - 前記工程(c−1)は、
前記放熱部材の前記端縁部と前記障壁との間の前記隙間から前記封止樹脂を注入し、前記開口部からガスを抜く工程を含む、請求項11記載の半導体パッケージの製造方法。 - 前記工程(c−1)は、
前記開口部から前記封止樹脂を注入し、前記放熱部材の前記端縁部と前記障壁との間の前記隙間からガスを抜く工程を含む、請求項11記載の半導体パッケージの製造方法。 - 前記絶縁基板は、
前記放熱部材を複数搭載可能な多面付け絶縁基板であって、
前記工程(c)の後、
前記多面付け絶縁基板を前記放熱部材ごとに個片化する工程をさらに備える、請求項11記載の半導体パッケージの製造方法。 - 前記絶縁基板は、
前記放熱部材を複数連結した連結型放熱部材を搭載可能な多面付け絶縁基板であって、
前記工程(c)の後、
前記連結型放熱部材および前記多面付け絶縁基板を個片化する工程をさらに備える、請求項11記載の半導体パッケージの製造方法。
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Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06224334A (ja) * | 1993-01-26 | 1994-08-12 | Hitachi Ltd | マルチチップモジュール |
JPH09246433A (ja) * | 1996-03-04 | 1997-09-19 | Fujitsu Ten Ltd | モジュールの放熱構造 |
JP2002110869A (ja) * | 2000-09-26 | 2002-04-12 | Toshiba Corp | 半導体装置 |
JP2002158316A (ja) * | 2000-11-16 | 2002-05-31 | Towa Corp | 半導体装置及びその製造方法 |
JP2004134592A (ja) * | 2002-10-10 | 2004-04-30 | Toyo Commun Equip Co Ltd | 表面実装型sawデバイス |
JP2007188934A (ja) * | 2006-01-11 | 2007-07-26 | Fuji Xerox Co Ltd | マルチチップモジュール |
JP2014154635A (ja) * | 2013-02-06 | 2014-08-25 | Fujitsu Semiconductor Ltd | 半導体装置および半導体装置の製造方法 |
JP2014179612A (ja) * | 2013-03-14 | 2014-09-25 | General Electric Co <Ge> | パワーオーバーレイ構造およびその製造方法 |
JP2015211091A (ja) * | 2014-04-24 | 2015-11-24 | Towa株式会社 | 樹脂封止電子部品の製造方法、突起電極付き板状部材、及び樹脂封止電子部品 |
WO2017145331A1 (ja) * | 2016-02-25 | 2017-08-31 | 三菱電機株式会社 | 半導体パッケージ、及びモジュール |
JP2017183521A (ja) * | 2016-03-30 | 2017-10-05 | 新光電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6144101A (en) * | 1996-12-03 | 2000-11-07 | Micron Technology, Inc. | Flip chip down-bond: method and apparatus |
CN101111935B (zh) | 2005-01-25 | 2011-02-02 | 富士通株式会社 | 半导体装置 |
JP2007184424A (ja) | 2006-01-06 | 2007-07-19 | Nec Electronics Corp | 半導体装置 |
JP5542765B2 (ja) | 2011-09-26 | 2014-07-09 | 日立オートモティブシステムズ株式会社 | パワーモジュール |
US8987876B2 (en) | 2013-03-14 | 2015-03-24 | General Electric Company | Power overlay structure and method of making same |
US10002857B2 (en) * | 2016-04-12 | 2018-06-19 | Qualcomm Incorporated | Package on package (PoP) device comprising thermal interface material (TIM) in cavity of an encapsulation layer |
-
2018
- 2018-11-30 WO PCT/JP2018/044204 patent/WO2019124024A1/ja active Application Filing
- 2018-11-30 JP JP2019560919A patent/JP6847266B2/ja active Active
- 2018-11-30 CN CN201880075629.9A patent/CN111492473A/zh active Pending
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Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06224334A (ja) * | 1993-01-26 | 1994-08-12 | Hitachi Ltd | マルチチップモジュール |
JPH09246433A (ja) * | 1996-03-04 | 1997-09-19 | Fujitsu Ten Ltd | モジュールの放熱構造 |
JP2002110869A (ja) * | 2000-09-26 | 2002-04-12 | Toshiba Corp | 半導体装置 |
JP2002158316A (ja) * | 2000-11-16 | 2002-05-31 | Towa Corp | 半導体装置及びその製造方法 |
JP2004134592A (ja) * | 2002-10-10 | 2004-04-30 | Toyo Commun Equip Co Ltd | 表面実装型sawデバイス |
JP2007188934A (ja) * | 2006-01-11 | 2007-07-26 | Fuji Xerox Co Ltd | マルチチップモジュール |
JP2014154635A (ja) * | 2013-02-06 | 2014-08-25 | Fujitsu Semiconductor Ltd | 半導体装置および半導体装置の製造方法 |
JP2014179612A (ja) * | 2013-03-14 | 2014-09-25 | General Electric Co <Ge> | パワーオーバーレイ構造およびその製造方法 |
JP2015211091A (ja) * | 2014-04-24 | 2015-11-24 | Towa株式会社 | 樹脂封止電子部品の製造方法、突起電極付き板状部材、及び樹脂封止電子部品 |
WO2017145331A1 (ja) * | 2016-02-25 | 2017-08-31 | 三菱電機株式会社 | 半導体パッケージ、及びモジュール |
JP2017183521A (ja) * | 2016-03-30 | 2017-10-05 | 新光電気工業株式会社 | 半導体装置及び半導体装置の製造方法 |
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