JPWO2016021020A1 - 半導体装置の製造方法、及び、半導体装置 - Google Patents
半導体装置の製造方法、及び、半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 195
- 238000004519 manufacturing process Methods 0.000 title claims description 65
- 210000000746 body region Anatomy 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 66
- 229910052710 silicon Inorganic materials 0.000 claims description 66
- 239000010703 silicon Substances 0.000 claims description 66
- 239000012535 impurity Substances 0.000 claims description 40
- 150000004767 nitrides Chemical class 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 102
- 229910052751 metal Inorganic materials 0.000 description 16
- 239000002184 metal Substances 0.000 description 16
- 239000011229 interlayer Substances 0.000 description 12
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 229920005591 polysilicon Polymers 0.000 description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 7
- 229910052796 boron Inorganic materials 0.000 description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 6
- 229910052785 arsenic Inorganic materials 0.000 description 6
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 6
- 229910052698 phosphorus Inorganic materials 0.000 description 6
- 239000011574 phosphorus Substances 0.000 description 6
- 238000009413 insulation Methods 0.000 description 5
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
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Abstract
Description
102.第3の第1導電型シリコン層
103.第1の絶縁膜
104.第5の絶縁膜
105.第2の絶縁膜
106.第6の絶縁膜
107.第1のレジスト
108.第7の絶縁膜
109.第3の絶縁膜
110.第8の絶縁膜
111.第4の絶縁膜
112.第2のレジスト
113.コンタクト孔
114.第1の柱状シリコン層
115.ポリシリコン
116.第9の絶縁膜
117.第3のレジスト
118.第10の絶縁膜
119.出力端子
120.ゲート絶縁膜
120a.第2のゲート絶縁膜
120b.第1のゲート絶縁膜
121.金属
121a.第2のゲート
121b.第1のゲート
122.第2の第2導電型シリコン層
123.第1の第2導電型シリコン層
124.第2の第1導電型シリコン層
125.第1の第1導電型シリコン層
126.拡散層
127.第2のボディ領域
128.第1の接続領域
129.第1のボディ領域
130.第1の層間絶縁膜
131.第2の層間絶縁膜
132.第4のレジスト
133.コンタクト孔
134.第11の絶縁膜
135.シリサイド
136.コンタクト
137.第5のレジスト
138.コンタクト孔
139.第6のレジスト
140.コンタクト孔
141.第1のコンタクト
142.コンタクト
143.金属
143a.金属配線
143b.金属配線
143c.金属配線
143d.金属配線
144.第7のレジスト
145.第7のレジスト
146.第7のレジスト
147.第7のレジスト
201.第3の第2導電型シリコン層
Claims (6)
- 半導体基板上に形成された第3の第1導電型半導体層と、
前記半導体基板上に形成された第1の柱状半導体層であって、第1導電型半導体層と第1のボディ領域、第2の第1導電型半導体層、第1の第2導電型半導体層、第2のボディ領域、第2の第2導電型半導体層、第3の第2導電型半導体層が基板側からこの順に形成された第1の柱状半導体層と、
前記第1のボディ領域の周囲に形成された第1のゲート絶縁膜と、
前記第1のゲート絶縁膜の周囲に形成された第1のゲートと、
前記第2のボディ領域の周囲に形成された第2のゲート絶縁膜と、
前記第2のゲート絶縁膜の周囲に形成された第2のゲートと、
前記第2の第1導電型半導体層と前記第1の第2導電型半導体層とに接続する半導体からなる出力端子と、
前記出力端子にさらに形成された前記第2の第1導電型半導体層と前記第1の第2導電型半導体層と、
前記第1のゲートと前記第2のゲートとを接続する第1のコンタクトと、
を有することを特徴とする半導体装置。 - 前記第1のゲート絶縁膜は前記第1のゲートの上面と下面にさらに形成され、前記第2のゲート絶縁膜は前記第2のゲートの上面と下面にさらに形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記第2の第1導電型半導体層と前記第1の第2導電型半導体層との間に形成された第1の接続領域を有することを特徴とする請求項1に記載の半導体装置。
- 前記第1の第1導電型半導体層を取り囲む第1の絶縁膜と、前記第2の第1導電型半導体層を取り囲む第2の絶縁膜とを有し、
前記第1の絶縁膜は、前記第1の第1導電型半導体層の不純物と同じ不純物を有し、
前記第2の絶縁膜は、前記第2の第1導電型半導体層の不純物と同じ不純物を有し、
前記第1の第2導電型半導体層を取り囲む第3の絶縁膜と、前記第2の第2導電型半導体層を取り囲む第4の絶縁膜とを有し、
前記第3の絶縁膜は、前記第1の第2導電型半導体層の不純物と同じ不純物を有し、
前記第4の絶縁膜は、前記第2の第2導電型半導体層の不純物と同じ不純物を有することを特徴とする請求項1に記載の半導体装置。 - 基板上に、第1の導電型の不純物を含む酸化膜である第2の絶縁膜を堆積し、窒化膜である第6の絶縁膜を堆積し、第1の導電型とは異なる導電型である第2の導電型の不純物を含む酸化膜である第3の絶縁膜を堆積し、前記第2の絶縁膜と前記第6の絶縁膜と前記第3の絶縁膜をエッチングしコンタクト孔を形成し、前記コンタクト孔にエピタキシャル成長により第1の柱状シリコン層を形成し、前記第6の絶縁膜を除去し、エピタキシャル成長を行うことにより出力端子を形成することを特徴とする半導体装置の製造方法。
- 前記コンタクト孔にエピタキシャル成長により第1の柱状シリコン層を形成した後に、熱処理を行うことにより、第1の柱状シリコン層と前記出力端子に第2の第1導電型半導体層と第1の第2導電型半導体層を形成することを特徴とする請求項5に記載の半導体装置の製造方法。
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