JPWO2015174158A1 - パワー半導体モジュールおよび複合モジュール - Google Patents

パワー半導体モジュールおよび複合モジュール Download PDF

Info

Publication number
JPWO2015174158A1
JPWO2015174158A1 JP2016519154A JP2016519154A JPWO2015174158A1 JP WO2015174158 A1 JPWO2015174158 A1 JP WO2015174158A1 JP 2016519154 A JP2016519154 A JP 2016519154A JP 2016519154 A JP2016519154 A JP 2016519154A JP WO2015174158 A1 JPWO2015174158 A1 JP WO2015174158A1
Authority
JP
Japan
Prior art keywords
lid
power semiconductor
semiconductor module
resin
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016519154A
Other languages
English (en)
Other versions
JP6233507B2 (ja
Inventor
堀　元人
元人 堀
池田　良成
良成 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of JPWO2015174158A1 publication Critical patent/JPWO2015174158A1/ja
Application granted granted Critical
Publication of JP6233507B2 publication Critical patent/JP6233507B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/115—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/049—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being perpendicular to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4075—Mechanical elements
    • H01L2023/4087—Mounting accessories, interposers, clamping or screwing parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H01L2224/13013—Shape in top view being rectangular or square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1301—Shape
    • H01L2224/13012—Shape in top view
    • H01L2224/13014—Shape in top view being circular or elliptic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/16257—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/81424—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399—Material
    • H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81447—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00015—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/171—Frame
    • H01L2924/176—Material
    • H01L2924/177—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/17738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/17747—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Inverter Devices (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)

Abstract

パワー半導体モジュール１は、筐体２内で半導体素子５のおもて面電極と絶縁基板３の回路板３３を電気的に接続する配線部材１０を備える。筐体２に設けられた第２の樹脂１５は配線部材１０を覆いかつ、配線部材１０の近傍の高さとする。筐体２内で第２の樹脂１５と第１の蓋１２の間に、外部端子９ａ、９ｂの周囲を覆うカバー１３が設けられる。筐体２の開口部で第１の蓋１２よりも外方に第２の蓋１４が設けられ、第２の蓋１４と第１の蓋１２との間に第１の樹脂１１が充填される。

Description

本発明は、パワー半導体モジュールおよび、このパワー半導体モジュールを組み合わせた複合モジュールに関する。
パワー半導体モジュールは、一般に、半導体素子としての半導体チップが搭載された絶縁基板を備えている。半導体チップと絶縁基板の回路板とは、はんだ等の接合材により、またボンディングワイヤや導電板を通して、電気的に接続されている。絶縁基板及び半導体チップは、筐体に収容される。筐体内の絶縁基板と電気的に接続されている外部端子が筐体よりも外方に延びている。筐体内は、絶縁性を高めるために封止材により封止されている。
従来のパワー半導体モジュールの一例を図４に断面図で示す。
図４に示すパワー半導体モジュール１０１は、金属製のベース板１０２を備えている。このベース板１０２上には、絶縁基板１０３が接合材１０４により接合されている。絶縁基板１０３は、絶縁板１３１と、絶縁板１３１の一方の面に設けられた金属板１３２と、絶縁板１３１のもう一方の面に設けられ、所定の回路を形成する回路板１３３とからなる。絶縁基板１０３は一例ではＤＣＢ（Ｄｉｒｅｃｔ Ｃｏｐｐｅｒ Ｂｏｎｄ）基板である。
回路板１３３に、ＩＧＢＴ(絶縁ゲートバイポーラトランジスタ)などの半導体チップ１０５が、導電性の接合材１０６により電気的かつ機械的に接続されている。
ベース板１０２の周囲に枠体１０７が設けられ、接合材１０８により接合されている。これによりパワー半導体モジュール１０１の筐体が構成されている。枠体１０７には、枠体１０７内側から外側へと延びる外部端子１０９が一体となっている。外部端子１０９と半導体チップ１０５のおもて面の電極とが、ボンディングワイヤ１１０により電気的に接続されている。
枠体１０７で取り囲まれた空間には半導体チップ１０５及び絶縁基板１０３が収容され、この空間内に封止材１１１が充填されている。これにより、半導体チップ１０５、絶縁基板１０３、ベース板１０２、外部端子１０９相互間の絶縁性が確保されている。
枠体１０７には，ねじ孔１０７ａが設けられている。このねじ孔１０７ａにねじ１２１を通して冷却部材１２２にねじ結合することにより、パワー半導体モジュール１０１は冷却部材１２２に固定される。ベース板１０２と冷却部材１２２との間には放熱グリス１２３が塗布され、これにより半導体チップ１０５からの熱を、絶縁基板１０３を通して冷却部材１２２に良好に伝熱させている。放熱グリス１２３の代わりに熱伝導シートが用いられることもある。
また、上記のようなパワー半導体モジュールを、バスバーにより複数個並列に接続することも提案されている（特許文献１）。
上記のようなパワー半導体モジュール１０１の絶縁性能を向上させるため、筐体内に充填される封止材１１１として、エポキシ樹脂等の熱硬化性樹脂が用いられることがある。一方、封止材１１１として熱硬化性樹脂を筐体内に多量に用いると、パワー半導体モジュール１０１の組み立て時の熱履歴及び使用時の外部環境の温度変化等が生じた際に熱応力が生じる。なぜなら、熱硬化性樹脂の線膨張係数が他の部材の線膨張係数と大きく異なるからである。そして、その熱応力により、ボンディングワイヤ１１０の破断やベース板１０２や枠体１０７の変形等が生じるおそれがあった。
ボンディングワイヤ１１０の破断は、直ちにパワー半導体モジュール１０１の故障となる。また、ベース板１０２や枠体１０７の変形により、冷却部材１２２との密着度が低下して熱抵抗が増大する。そして、熱抵抗の増大により半導体チップ１０５の温度の上昇を招き、パワー半導体モジュール１０１の長期信頼性を低下させるおそれがある。また、熱硬化性樹脂を多量に用いることは、パワー半導体モジュール１０１のコスト上昇や重量増加にもつながる。
ゲル状の樹脂、例えばシリコーン樹脂を２層に分けて筐体内に注入し、その内１層目の樹脂を補助リード端子に接触しない位置まで注入して硬化させたパワー半導体装置がある（特許文献２）。また、容器内部に充填されたゲル剤の上面と、容器の上蓋に相当する封止板の下面との間に空間が形成され、さらに封止板に設けられた外部端子用の孔をハードレジンで塞いだパワー半導体装置がある（特許文献３）。
しかし、特許文献２や特許文献３に用いられたゲル状のシリコーン樹脂は、耐熱性が熱硬化性樹脂に劣る。また高耐圧用のパワー半導体モジュールにおいて、シリコーン樹脂は絶縁性が必ずしも十分ではなかった。また、特許文献３の封止板の孔をハードレジンで塞ぐ構造は、封止板の形状が複雑であるため、製造コストが上昇する。
特開２０１２−１０５３８２号公報 特開平１０−２７０６０８号公報 特開平２００３−６８９７９号公報
本発明は、上記の問題を有利に解決するものであり、高耐圧用のパワー半導体モジュールにおいて、絶縁性が高く、さらにベース板や枠体の変形等を抑制し、長期信頼性の高いものとすることのできるパワー半導体モジュールと、それらを組み合わせた複合モジュールを提供することを目的とする。
本発明の一様態のパワー半導体モジュールは、開口部を有する筐体と、前記筐体の内部に収容された回路板と、おもて面に電極を有し、裏面が前記回路板に固定された半導体素子と、前記半導体素子の電極と前記回路板との間を電気的に接続する配線部材と、前記筐体の開口部に固定された第１の蓋と、前記筐体の開口部に固定され、前記第１の蓋よりも外方に設けられた第２の蓋と、前記第１の蓋と前記第２の蓋との間に配置された第１の樹脂と、前記配線部材を覆い、露出面を有し、前記露出面が前記第１の蓋よりも前記配線部材に近い第２の樹脂と、一端が前記回路板に電気的かつ機械的に接続され、他端が前記第２の蓋よりも外方に突出した外部端子と、前記外部端子を覆い、前記第２の樹脂の露出面と前記第１の蓋との間に配置されたカバーとを備えている。
また本発明の別の様態の複合モジュールは、上記のパワー半導体モジュールを複数個備え、各パワー半導体モジュールの前記外部端子同士を電気的に接続するバスバーユニットを備えている。
本発明のパワー半導体モジュール及び複合モジュールによれば、高耐圧用のパワー半導体モジュールにおいて、絶縁性が高く、さらにベース板やケースの変形等を抑制し、長期信頼性の高いものとすることができる。
図１は、本発明の実施形態１のパワー半導体モジュールの断面図である。 図２は、実施形態２のパワー半導体モジュールの断面図である。 図３は、実施形態３の複合モジュールの断面図である。 図４は、従来のパワー半導体モジュールの一例の断面図である。
以下、本発明のパワー半導体モジュールの実施形態について、図面を参照しつつ具体的に説明する。なお、本出願の記載に用いられている「電気的かつ機械的に接続されている」という用語は、対象物同士が直接接合により接続されている場合に限られず、ハンダや金属焼結材などの導電性の接合材を介して対象物同士が接続されている場合も含むものとする。
（実施形態１）
図１は、本発明の実施形態１のパワー半導体モジュールの断面図である。本実施形態のパワー半導体モジュールは、いわゆる１ｉｎ１モジュールと呼称されるものであり、スイッチング素子と還流ダイオードが逆並列に接続された回路を有している。
図１に示した本実施形態のパワー半導体モジュール１は、ベース板８と枠体７からなる筐体２と、絶縁基板３の一部である回路板３３と、半導体素子としての半導体チップ５と、配線部材１０と、第１の蓋１２と、第２の蓋１４と、第１の樹脂１１と、第２の樹脂１５と、外部端子９（９ａ、９ｂ）と、カバー１３を備えている。
放熱用の金属製のベース板８は、略四角形の平面形状を有している。このベース板８上には、絶縁基板３が接合されている。絶縁基板３は図１で示すとおり、絶縁板３１と、絶縁板３１の一方の面に設けられた金属板３２と、絶縁板３１のもう一方の面に設けられ、所定の回路が形成された回路板３３とで構成されている。絶縁基板３の金属板３２は、ベース板８の主面と、はんだなどの接合材４により接合されている。絶縁板３１は例えば窒化アルミニウムや窒化珪素、酸化アルミニウム等の絶縁性セラミックスよりなり、金属板３２、回路板３３は、例えば銅よりなる。そして回路板３３は、図示した例では所定の回路が形成された回路板３３ａ、３３ｂを有している。絶縁基板３は、これらの絶縁板３１と金属板３２、回路板３３とを直接接合したＤＣＢ基板等を用いることができる。
半導体チップ５は、おもて面および裏面にそれぞれ電極が設けられている。そして、裏面の電極がはんだなどの導電性の接合材６を介して、回路板３３ａに電気的かつ機械的に接続されている。半導体チップ５は、具体的には、例えばショットキーバリアダイオードやパワーＭＯＳＦＥＴ（Metal Oxide Semiconductor Field Effect Transistor）やＩＧＢＴ（Insulated Gate Bipolar Transistor）である。半導体チップ５はシリコン半導体からなるものでもよいし、ＳｉＣ半導体からなるものでもよい。半導体チップ５がＩＧＢＴの場合では、裏面の電極はコレクタ電極であり、おもて面の電極はエミッタ電極及びゲート電極である。半導体チップ５が炭化ケイ素（ＳｉＣ）からなるパワーＭＯＳＦＥＴである場合は、シリコンからなる半導体チップに比べて高耐圧で、かつ高周波でのスイッチングが可能であるために、本実施形態のパワー半導体モジュールの半導体チップ５として最適である。もっとも、半導体チップ５は、ＩＧＢＴやパワーＭＯＳＦＥＴに限定されず、スイッチングの動作が可能な半導体素子の一個又は複数個の組み合わせであればよい。
ベース板８の周縁に枠体７が設けられている。枠体７は枠形状を有し、絶縁性、耐熱性、成形性のよい樹脂、例えばエポキシ樹脂やＰＰＳ（Polyphenylene Sulfide）、ＰＢＴ（Polybutylene terephthalate）等からなる。また、枠体７はセラミックスでも構わない。枠体７の下端部は、ベース板８の主面の周縁に接着剤により接合され、枠体７とベース板８によりパワー半導体モジュール１の筐体２が構成されている。筐体２内には絶縁基板３や半導体チップ５が収容される。筐体２内の回路板３３ａ、３３ｂに、外部端子９ａ、９ｂの一端が電気的かつ機械的に接続されている。外部端子９ａ、９ｂの他端は、上方に延び、後述する第２の蓋よりも外方に突出し、接続部９ａｃ、９ｂｃを構成している。
パワー半導体モジュール１には、配線部材１０が設けられている。配線部材１０は、導電板１０ａと、導電ポスト１０ｂにより構成されている。導電板１０ａは、半導体チップ５及び絶縁基板３の回路板３３に対向して設けられている。そして、導電ポスト１０ｂは、一端が半導体チップ５の第２電極又は絶縁基板３の回路板３３に電気的かつ機械的に接続され、他端が導電板１０ａと電気的かつ機械的に接続されている。
配線部材１０により、例えば半導体チップ５のおもて面電極と、回路板３３ｂとが電気的に接続される。本実施形態において配線部材はボンディングワイヤよりも、導電板１０ａと導電ポスト１０ｂで構成された配線部材１０が好ましい。後述するように本実施形態においては、枠体７内に注入される第２の樹脂１５が熱硬化性樹脂であるため、配線部材がボンディングワイヤである場合には、熱硬化性樹脂と他の部材との線膨張係数の相違によってボンディングワイヤが破断するおそれがあった。これに対し配線部材が導電板１０ａと導電ポスト１０ｂで構成される場合には、熱硬化性の第２の樹脂１５であっても破断等が生じず、またベース板８や枠体７の過度な変形も回避することができ、長期信頼性と高絶縁性能との両立が可能となる。配線部材１０は、例えば半導体チップ５がＩＧＢＴである場合には、おもて面電極のうちのエミッタ電極と、絶縁基板３の回路板３３ｂを電気的に接続している。また、配線部材１０は、おもて面電極のうちのゲート電極と、絶縁基板３の回路板３３ｃ（図示せず）を電気的に接続している。
導電板１０ａや導電ポスト１０ｂは、例えば導電性のよい銅よりなる。また、導電板１０ａや導電ポスト１０ｂは、必要に応じてめっきを表面に施すことができる。導電ポスト１０ｂの外形は、円柱形状、直方体形状等の形状とすることができるが特に限定されない。導電ポスト１０ｂの底面は、半導体チップ５のおもて面電極より小さい大きさである。更に、一つの半導体チップ５に対する導電ポスト１０ｂの設置数は任意であり、一つのおもて面電極に複数個の導電ポスト１０ｂを接合することも可能である。
導電板１０ａと導電ポスト１０ｂとは、はんだやロウ付けにより電気的かつ機械的に接続されている。パワー半導体モジュール１は、導電板１０ａと導電ポスト１０ｂとをあらかじめ一体化した配線部材１０を用いているので、その製造工程を簡素化することができる。
また、導電板１０ａは銅板に限られず、絶縁板の少なくとも一方の表面に、銅やアルミニウム等の導電性金属により形成された金属層が形成された回路基板であってもよい。回路基板である場合は、少なくとも２層の金属層を有する構成が好ましい。一層は、半導体チップ５のおもて面電極のうちのエミッタ電極と、絶縁基板３の回路板３３ｂを電気的に接続するための金属層である。もう一層は、半導体チップ５のおもて面電極のうちのゲート電極と、絶縁基板３の回路板３３ｃ（図示せず）を電気的に接続するための金属層である。
筐体２内に第２の樹脂１５が注入され、絶縁基板３、半導体チップ５、配線部材１０が封止され、第２の樹脂１５の露出面１５ａが形成される。第２の樹脂１５は、絶縁性が高く、更に高温使用に耐えられるという観点から熱硬化性の樹脂とし、例えばエポキシ樹脂が好ましい。第２の樹脂１５は、配線部材１０を覆い、かつ配線部材１０の上端の近傍の高さで注入される。具体的には、配線部材１０の上端より１ｍｍ程度高い高さに、露出面１５ａが配置される。例えば、ベース板８の上面から配線部材１０の上端までの高さを１０ｍｍ程度にした場合、露出面１５ａはベース板８の上面から１１ｍｍ程度の高さにすると良い。第２の樹脂１５の注入量が多いほど、筐体２内で第２の樹脂１５による熱応力が発生し易く、パワー半導体モジュールの長期信頼性が低下する。また、コストや軽量化の観点からも不利である。よって本実施形態では、第２の樹脂１５の注入量を、上述した配線部材１０を覆うだけの必要最小限とする。これにより、パワー半導体モジュール１の変形を抑制するとともに、パワー半導体モジュール１のコストアップ、重量アップを回避することが可能となる。また、前述のように配線部材を導電板１０ａと導電ポスト１０ｂで構成することにより、従来例のボンディングワイヤによる配線に比べて、配線部材の上端の高さを正確に制御することができる。このため、第２の樹脂１５の注入量を上記のように必要かつ最小限に制御することができるため、有効である。
筐体２内における露出面１５ａよりも上側の領域は、空間とすればよい。この領域に空間を設け、ベース板８と外部端子の接続部９ａｃ、９ｂｃとの距離を確保することによって、パワー半導体モジュール１の高耐圧特性が確保できる。また別の例として，第２の樹脂１５より上側の領域に、樹脂よりなる封止材とは別の封止材、例えばゲル状の封止材を注入して絶縁性を確保することも可能である。
枠体７に設けられた段差部７ａに係止され、筐体２の開口部を覆うように、第１の蓋１２が設けられる。第１の蓋１２は、絶縁性、耐熱性、成形性のよい樹脂、例えばエポキシ樹脂やＰＰＳ、ＰＢＴなどからなる。セラミックスでも構わない。また第１の蓋１２には孔が設けられていて、その孔に外部端子９ａ、９ｂが通される。
第１の蓋１２と、第２の樹脂１５の露出面１５ａとの間の空間において、外部端子９の周囲を覆って、カバー１３が設けられている。カバー１３は、一例では中空の円筒形状であって、内径が外部端子９ａ、９ｂを挿入可能な大きさになっている。カバー１３は、絶縁性、耐熱性、成形性のよい樹脂、例えばエポキシ樹脂やＰＰＳ、ＰＢＴなどからなる。カバー１３の上端は第１の蓋１２に当接し、下端は第２の樹脂１５内に達していれば特に位置を問わない。なお図１に示した例では、カバー１３の下端は回路板３３まで達している。また別の例として図３に示した例では、カバー１３の下端が第２の樹脂１５の露出面１５ａの近傍に配置されている。
第１の蓋１２と第２の樹脂１５との間の空間で、外部端子９ａ、９ｂをカバー１３で覆うことにより、外部端子９ａ、９ｂは空間に露出することがなくなって絶縁性が維持される。そのため、パワー半導体モジュール１の高耐圧特性を確保することができる。また、第１の蓋１２とカバー１３との組み合わせは、特許文献３に記載された封止板のような複雑形状ではないため製造が容易であり、製造コストが安価に済む。
第１の蓋１２よりも筐体２の外方に、第２の蓋１４が設けられる。第２の蓋１４は、第１の蓋１２と同様に、絶縁性、耐熱性、成形性のよい樹脂、例えばエポキシ樹脂やＰＰＳ、ＰＢＴなどからなる。また、第２の蓋１４はセラミックスでも構わない。第２の蓋１４にも第１の蓋１２と同様に孔が設けられていて、外部端子９ａ、９ｂが通される。
第１の蓋１２と第２の蓋１４との間には、第１の樹脂１１が充填される。第１の樹脂１１は、第２の樹脂１５と同様に、絶縁性が高い熱硬化性の絶縁性樹脂として、エポキシ樹脂が好ましい。
第１の蓋１２と第２の蓋１４との間に第１の樹脂１１が充填されたことにより、パワー半導体モジュール１の高耐圧特性を高めることができる。また、充填された第１の樹脂１１は外部端子９ａ、９ｂに接するように配置される。そして、第１の樹脂１１は、第１の蓋１２及び第２の蓋１４に設けられた外部端子９ａ、９ｂを挿通する孔と、外部端子９ａ、９ｂとの隙間を埋めるように配置される。これにより、筐体２の内部とパワー半導体モジュール１の外部との絶縁が確保でき、パワー半導体モジュール１の高耐圧特性を確保することができる。
さらに第１の樹脂１１は、第１の蓋１２とカバー１３との当接箇所に生じ得る隙間を埋めることも可能であり、この点でも、高耐圧特性に有利である。第１の樹脂１１は第２の蓋１４と第１の蓋１２との間で、１ｍｍ程度の厚さを有していれば十分であるため、第２の蓋１４と第１の蓋１２との間の間隙は、１ｍｍ程度とする。
またさらに第１の樹脂１１は、第１の蓋１２および第２の蓋１４と、枠体７との間の隙間を埋め、同時に蓋１２、１４を枠体７に固定する接着材としても機能している。これにより、高耐圧特性を確保できるとともに、蓋と枠体を接着する接着材を別途準備する必要がなくなるため、製造コストも低減可能である。
本実施形態のパワー半導体モジュール１は、長期信頼性は高い一方、線膨張係数が大きく、熱応力の大きい熱硬化性樹脂からなる第２の樹脂１５を、配線部材１０を覆う必要最小限の量とする。そして、筐体２内の第２の樹脂１５と開口部との間に空間を設けることにより、沿面距離を確保している。また、この空間内で外部端子９ａ、９ｂをカバー１３で覆うことにより外部端子９ａ、９ｂ近傍の絶縁性を確保している。更に、第２の蓋１４と第１の蓋１２とを設け、これらの間に第１の樹脂１１を充填することより、筐体２の開口部での絶縁性を高めている。したがって、本実施形態のパワー半導体モジュール１は、長期信頼性を維持しつつ高い絶縁性を得ることができる。
パワー半導体モジュール１は、従来のパワー半導体モジュールと同様に、冷却部材（図示せず）にねじなどで固定される。そして接地されている冷却部材と外部端子と間の沿面距離を長くして絶縁性を高めるために、本実施形態では枠体７の外面７ｂには凹凸が設けられている。これらの凹凸が、上述した構成と相まって、パワー半導体モジュール１の高耐圧特性に寄与している。本実施形態により、例えば耐圧１３ｋＶ以上という、極めて高い耐圧特性を具備するパワー半導体モジュールが得られる。なお、パワー半導体モジュール１の耐圧特性は、冷却部材から外部端子９ａ、９ｂの接続部９ａｃ、９ｂｃまでの高さ、で決まる。そのため、所望の耐圧特性に合わせて、第２の樹脂１５と第１の蓋１２との間隔を適宜調整し、必要な長さの外部端子９ａ、９ｂを設ければよい。
（実施形態２）
図２に、本発明の実施形態２のパワー半導体モジュールの断面図を示す。図２においては、図１に示した実施形態１のパワー半導体モジュール１と同一の部材について同一の符号を付した。したがって、以下に述べる実施形態２のパワー半導体モジュールの説明では、図１に示した実施形態１のパワー半導体モジュール１と同一の部材についての重複する説明は省略する。
図２に示した実施形態２のパワー半導体モジュール２１の、図１に示した実施形態１のパワー半導体モジュール１との相違点は、第２の蓋１４から外方に突出する複数の外部端子９ａ、９ｂ（具体的には例えばＰ端子とＮ端子）の間に、第２の蓋１４の突起１４ａを設けた点である。突起１４ａが設けられたことにより、外部端子９ａ、９ｂ間の絶縁性を高めることができ、ひいてはパワー半導体モジュール２１の絶縁性を、より高めることができる。
（実施形態３）
図３に、本発明の実施形態３の複合モジュールの断面図を示す。図３においては、図２に示した実施形態２のパワー半導体モジュール２１と同一の部材について同一の符号を付した。したがって、以下に述べる実施形態３の複合モジュールの説明では、実施形態２のパワー半導体モジュール２１と同一の部材についての重複する説明は省略する。
図３に示した複合モジュール４１は、２個のパワー半導体モジュール２１を備えている。そして、２個のパワー半導体モジュール２１において対応する同一の外部端子９ａ、９ｂ同士を電気的に接続する、バスバーユニット４２を備えている。バスバーユニット４２は、例えばＰ端子用の外部端子９ａ同士を接続するバスバー４３と、Ｎ端子用の外部端子９ｂ同士を接続するバスバー４４とを有し、バスバー４３、４４を絶縁性のモールド樹脂４５で一体的に成形してなるものである。この構成により、１ｉｎ１モジュールであるパワー半導体モジュール２１を複数並列に接続し、定格の電流容量を増加させた１ｉｎ１モジュールが構成される。バスバー４３と外部端子９ａとの接続やバスバー４４と外部端子９ｂとの接続は、ねじ止め、はんだ、レーザ溶接等によって行われる。またモールド樹脂４５は、例えばエポキシ樹脂、ＰＰＳ、ＰＢＴ等である。バスバー４３、４４は、それぞれ外部装置（図示せず）と電気的に接続する端子部４３ａ、４４ａを有している。またバスバー４３、４４は、１ｍｍ以下の間隔を空け、上下方向に部分的に重なり合うように配置されている。これにより、バスバー４３、４４に互いに逆向きの電流が流れるとき、その電流による磁力線を相殺させ、自己インダクタンスを低減させることができる。
また、バスバーユニット４２には、端子部４３ａと４４ａとの間に、モールド樹脂４５と一体である凹凸部４５ａが設けられている。凹凸部４５ａにより端子部４３ａと４４ａ間の絶縁性を高めることができ、ひいては複合モジュール４１の絶縁性を、より高めることができる。
本実施形態の複合モジュール４１は、複数のパワー半導体モジュールを並列に接続しているが、用途に応じ、直列に接続するようにバスバーユニットのバスバー配置とすることができる。
以上、本発明のパワー半導体モジュール及び複合モジュールを図面及び実施形態を用いて具体的に説明したが、本発明のパワー半導体モジュール及び複合モジュールは、実施形態及び図面の記載に限定されるものではなく、本発明の趣旨を逸脱しない範囲で幾多の変形が可能である。
１、２１ パワー半導体モジュール
２ 筐体
３ 絶縁基板
３１ 絶縁板
３２ 金属板
３３ 回路板
４、６ 接合材
５ 半導体チップ（半導体素子）
７ 枠体
８ ベース板
９ａ、９ｂ 外部端子
９ａｃ、９ｂｃ 接続部
１０ 配線部材
１０ａ 導電板
１０ｂ 導電ポスト
１１ 第１の樹脂
１２ 第１の蓋
１３ カバー
１４ 第２の蓋
１５ 第２の樹脂
１５ａ 露出面
４１ 複合モジュール
４２ バスバーユニット
４３、４４ バスバー
４５ モールド樹脂
ベース板８の周縁に枠体７が設けられている。枠体７は枠形状を有し、絶縁性、耐熱性、成形性のよい樹脂、例えばエポキシ樹脂やＰＰＳ（Polyphenylene Sulfide）、ＰＢＴ（Polybutylene terephthalate）等からなる。また、枠体７はセラミックスでも構わない。枠体７の下端部は、ベース板８の主面の周縁に接着剤により接合され、枠体７とベース板８によりパワー半導体モジュール１の筐体２が構成されている。筐体２内には絶縁基板３や半導体チップ５が収容される。筐体２内の回路板３３ａ、３３ｂに、外部端子９ａ、９ｂの一端が電気的かつ機械的に接続されている。外部端子９ａ、９ｂの他端は、上方に延び、後述する第２の蓋１４よりも外方に突出し、接続部９ａｃ、９ｂｃを構成している。

Claims (14)

  1. 開口部を有する筐体と、
    前記筐体の内部に収容された回路板と、
    おもて面に電極を有し、裏面が前記回路板に固定された半導体素子と、
    前記半導体素子の電極と前記回路板との間を電気的に接続する配線部材と、
    前記筐体の開口部に固定された第１の蓋と、
    前記筐体の開口部に固定され、前記第１の蓋よりも外方に設けられた第２の蓋と、
    前記第１の蓋と前記第２の蓋との間に配置された第１の樹脂と、
    前記配線部材を覆い、露出面を有し、前記露出面が前記第１の蓋よりも前記配線部材に近い第２の樹脂と、
    一端が前記回路板に電気的かつ機械的に接続され、他端が前記第２の蓋よりも外方に突出した外部端子と、
    前記外部端子を覆い、前記第２の樹脂の露出面と前記第１の蓋との間に配置されたカバーと、
    を備えるパワー半導体モジュール。
  2. 前記第１の蓋と前記第２の蓋の間において、前記外部端子は前記第１の樹脂で封止されている請求項１記載のパワー半導体モジュール。
  3. 前記配線部材が、前記半導体素子及び前記回路板に対向して設けられた導電板と、
    一端が前記半導体素子の第２電極又は前記回路板に電気的かつ機械的に接続され、他端が前記導電板と電気的かつ機械的に接続される導電ポストとを有する請求項１記載のパワー半導体モジュール。
  4. 前記筐体の外部の側面に凹凸を有する請求項１記載のパワー半導体モジュール。
  5. 前記第２の蓋が、外部に突出する複数の前記外部端子の間に突起を有する請求項１記載のパワー半導体モジュール。
  6. 前記第１の樹脂および前記第２の樹脂が、熱硬化性樹脂である請求項１記載のパワー半導体モジュール。
  7. 前記カバーが、前記筐体の内部の側面と離れて設けられた請求項１記載のパワー半導体モジュール。
  8. 前記半導体素子が裏面に他の電極を有する縦型半導体素子であり、前記他の電極と前記回路板が電気的かつ機械的に接続されている請求項１記載のパワー半導体モジュール。
  9. 前記筐体が、枠体とベース板からなる請求項１記載のパワー半導体モジュール。
  10. 前記回路板が絶縁基板の一部であり、前記絶縁基板は前記ベース板に固定されている請求項９記載のパワー半導体モジュール。
  11. 前記配線部材と、前記露出面が約１ｍｍ離れている請求項１記載のパワー半導体モジュール。
  12. 請求項１記載のパワー半導体モジュールを複数個備え、各パワー半導体モジュールの前記外部端子同士を電気的に接続するバスバーユニットを備える複合モジュール。
  13. 前記バスバーユニットは、複数のバスバーを間隔を空けて部分的に重ね合わせてなる請求項１２記載の複合モジュール。
  14. 前記バスバーユニットにおける複数のバスバーの間隔が１ｍｍ以下である請求項１３記載の複合モジュール。
JP2016519154A 2014-05-15 2015-04-01 パワー半導体モジュールおよび複合モジュール Expired - Fee Related JP6233507B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014101423 2014-05-15
JP2014101423 2014-05-15
PCT/JP2015/060340 WO2015174158A1 (ja) 2014-05-15 2015-04-01 パワー半導体モジュールおよび複合モジュール

Publications (2)

Publication Number Publication Date
JPWO2015174158A1 true JPWO2015174158A1 (ja) 2017-04-20
JP6233507B2 JP6233507B2 (ja) 2017-11-22

Family

ID=54479702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016519154A Expired - Fee Related JP6233507B2 (ja) 2014-05-15 2015-04-01 パワー半導体モジュールおよび複合モジュール

Country Status (4)

Country Link
US (1) US9761567B2 (ja)
JP (1) JP6233507B2 (ja)
CN (1) CN105765716B (ja)
WO (1) WO2015174158A1 (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6617490B2 (ja) * 2015-09-15 2019-12-11 富士電機株式会社 半導体装置
JP6759784B2 (ja) * 2016-07-12 2020-09-23 三菱電機株式会社 半導体モジュール
JP6786416B2 (ja) * 2017-02-20 2020-11-18 株式会社東芝 半導体装置
WO2018154687A1 (ja) * 2017-02-23 2018-08-30 三菱電機株式会社 半導体装置
WO2019011890A1 (en) 2017-07-12 2019-01-17 Abb Schweiz Ag POWER SEMICONDUCTOR MODULE
US10283447B1 (en) * 2017-10-26 2019-05-07 Infineon Technologies Ag Power semiconductor module with partially coated power terminals and method of manufacturing thereof
US10756162B2 (en) * 2018-08-31 2020-08-25 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device with magnetic element
FR3089057B1 (fr) * 2018-11-28 2021-09-10 Inst Supergrid Système incluant un module électrique de puissance et une gaine contre les arcs électriques
EP3736855A1 (en) 2019-05-06 2020-11-11 Infineon Technologies AG Power semiconductor module arrangement and method for producing the same
EP3736858A1 (en) 2019-05-06 2020-11-11 Infineon Technologies AG Power semiconductor module arrangement
EP3736854A1 (en) 2019-05-06 2020-11-11 Infineon Technologies AG Power semiconductor module arrangement
CN111128022B (zh) * 2019-12-24 2021-04-23 云谷（固安）科技有限公司 一种显示面板及其制备方法、显示装置
EP4064328A1 (en) * 2021-03-25 2022-09-28 Infineon Technologies AG Housing, semiconductor module and methods for producing the same
JP2023045654A (ja) * 2021-09-22 2023-04-03 株式会社東芝 半導体装置
CN117766470B (zh) * 2024-02-20 2024-05-14 北京怀柔实验室 半导体器件的封装结构和封装方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63132448U (ja) * 1987-02-20 1988-08-30
JPH113995A (ja) * 1997-06-12 1999-01-06 Toshiba Corp 半導体装置
JP2003068979A (ja) * 2001-08-28 2003-03-07 Hitachi Ltd 半導体装置
US20090213553A1 (en) * 2008-02-27 2009-08-27 Infineon Technologies Ag Power Module
JP2012119618A (ja) * 2010-12-03 2012-06-21 Fuji Electric Co Ltd パワー半導体モジュール
JP2012238684A (ja) * 2011-05-11 2012-12-06 Mitsubishi Electric Corp 電力用半導体装置

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4127840A (en) * 1977-02-22 1978-11-28 Conrac Corporation Solid state force transducer
JPS58175650U (ja) * 1982-05-19 1983-11-24 日本電気株式会社 樹脂封止型半導体装置
EP0346061A3 (en) * 1988-06-08 1991-04-03 Fujitsu Limited Integrated circuit device having an improved package structure
DE3915707A1 (de) * 1989-05-13 1990-11-22 Asea Brown Boveri Kunststoffgehaeuse und leistungshalbleitermodul mit diesem gehaeuse
JPH04196580A (ja) * 1990-11-28 1992-07-16 Mitsubishi Electric Corp 半導体装置
US5268533A (en) * 1991-05-03 1993-12-07 Hughes Aircraft Company Pre-stressed laminated lid for electronic circuit package
US5257547A (en) * 1991-11-26 1993-11-02 Honeywell Inc. Amplified pressure transducer
JPH10270608A (ja) 1997-03-28 1998-10-09 Hitachi Ltd 樹脂封止型パワー半導体装置
DE29900370U1 (de) * 1999-01-12 1999-04-08 Eupec Gmbh & Co Kg Leistungshalbleitermodul mit Deckel
US7166910B2 (en) * 2000-11-28 2007-01-23 Knowles Electronics Llc Miniature silicon condenser microphone
AU2002343325B2 (en) * 2001-08-10 2006-08-03 Black & Decker Inc. Electrically isolated module
JP3813098B2 (ja) * 2002-02-14 2006-08-23 三菱電機株式会社 電力用半導体モジュール
US6781231B2 (en) * 2002-09-10 2004-08-24 Knowles Electronics Llc Microelectromechanical system package with environmental and interference shield
WO2005055317A1 (ja) * 2003-12-05 2005-06-16 Matsushita Electric Industrial Co., Ltd. パッケージされた電子素子、及び電子素子パッケージの製造方法
US7608789B2 (en) * 2004-08-12 2009-10-27 Epcos Ag Component arrangement provided with a carrier substrate
JP4338620B2 (ja) * 2004-11-01 2009-10-07 三菱電機株式会社 半導体装置及びその製造方法
US7202552B2 (en) * 2005-07-15 2007-04-10 Silicon Matrix Pte. Ltd. MEMS package using flexible substrates, and method thereof
US20070075417A1 (en) * 2005-10-05 2007-04-05 Samsung Electro-Mechanics Co., Ltd. MEMS module package using sealing cap having heat releasing capability and manufacturing method thereof
US8154114B2 (en) * 2007-08-06 2012-04-10 Infineon Technologies Ag Power semiconductor module
JP4553043B2 (ja) * 2008-09-12 2010-09-29 株式会社村田製作所 音響的トランスデューサユニット
US8325951B2 (en) * 2009-01-20 2012-12-04 General Mems Corporation Miniature MEMS condenser microphone packages and fabrication method thereof
JP2011198866A (ja) * 2010-03-18 2011-10-06 Renesas Electronics Corp 半導体装置およびその製造方法
JP2012105382A (ja) 2010-11-08 2012-05-31 Hitachi Ltd 半導体装置
JP2012138531A (ja) * 2010-12-28 2012-07-19 Sansha Electric Mfg Co Ltd 半導体パワーモジュール
CN103890932B (zh) * 2011-11-22 2017-03-29 富士通株式会社 电子部件及其制造方法
KR20140057979A (ko) * 2012-11-05 2014-05-14 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63132448U (ja) * 1987-02-20 1988-08-30
JPH113995A (ja) * 1997-06-12 1999-01-06 Toshiba Corp 半導体装置
JP2003068979A (ja) * 2001-08-28 2003-03-07 Hitachi Ltd 半導体装置
US20090213553A1 (en) * 2008-02-27 2009-08-27 Infineon Technologies Ag Power Module
JP2012119618A (ja) * 2010-12-03 2012-06-21 Fuji Electric Co Ltd パワー半導体モジュール
JP2012238684A (ja) * 2011-05-11 2012-12-06 Mitsubishi Electric Corp 電力用半導体装置

Also Published As

Publication number Publication date
US9761567B2 (en) 2017-09-12
US20160254255A1 (en) 2016-09-01
WO2015174158A1 (ja) 2015-11-19
CN105765716B (zh) 2018-06-22
CN105765716A (zh) 2016-07-13
JP6233507B2 (ja) 2017-11-22

Similar Documents

Publication Publication Date Title
JP6233507B2 (ja) パワー半導体モジュールおよび複合モジュール
JP6237912B2 (ja) パワー半導体モジュール
US9171773B2 (en) Semiconductor device
JP6354845B2 (ja) 半導体モジュール
JP2011253862A (ja) パワー半導体装置
US8373197B2 (en) Circuit device
US10163752B2 (en) Semiconductor device
JP6439389B2 (ja) 半導体装置
JP2013069782A (ja) 半導体装置
US20120306086A1 (en) Semiconductor device and wiring substrate
JP6149932B2 (ja) 半導体装置
US10959333B2 (en) Semiconductor device
JP2007012831A (ja) パワー半導体装置
US20150243638A1 (en) Semiconductor device
JP2016181536A (ja) パワー半導体装置
US20240186221A1 (en) Semiconductor device
JP6248803B2 (ja) パワー半導体モジュール
CN110771027B (zh) 功率半导体装置及使用该装置的电力转换装置
JP6417758B2 (ja) 半導体装置
US8810014B2 (en) Semiconductor package including conductive member disposed between the heat dissipation member and the lead frame
JP2013102242A (ja) パワー半導体装置
CN112530915A (zh) 半导体装置
JP6818636B2 (ja) パワー半導体モジュール
JP6769556B2 (ja) 半導体装置及び半導体モジュール
JP2019046839A (ja) パワー半導体モジュール

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170314

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170515

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20170926

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20171009

R150 Certificate of patent or registration of utility model

Ref document number: 6233507

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees