JPS6484746A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6484746A
JPS6484746A JP62244972A JP24497287A JPS6484746A JP S6484746 A JPS6484746 A JP S6484746A JP 62244972 A JP62244972 A JP 62244972A JP 24497287 A JP24497287 A JP 24497287A JP S6484746 A JPS6484746 A JP S6484746A
Authority
JP
Japan
Prior art keywords
polysilicon
gate
psg
drain regions
impurity concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62244972A
Other languages
Japanese (ja)
Inventor
Hirobumi Watanabe
Koji Mori
Zenichi Akiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP62244972A priority Critical patent/JPS6484746A/en
Publication of JPS6484746A publication Critical patent/JPS6484746A/en
Pending legal-status Critical Current

Links

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a semiconductor device which can be manufactured by a simple process and not only has a large throughput but also is equipped with a polysilicon gate having single conductivity type polarity, by causing the impurity concentration of polysilicon acting as a gate electrode to be more than a specified value and its impurity concentration at source and drain regions to be less than the specified value. CONSTITUTION:At a semiconductor device where its polysilicon gate 6 has single conductivity type polarity, the impurity concentration of polysilicon to be formed as a gate electrode 6 will be more than 5X10<20> atoms/cm<3> and that of source and drain regions will be less than 5X10<20>atoms/cm<3>. For example, polysilicon which is deposited on a glass substrate 1 is patterned by leaving active layer parts 2 of n and p-types ch transistors as it is and a gate insulating film 3 is formed. After that, polysilicon 4 is deposited. PSG 5 is formed on polysilicon 4 and the gate allows polysilicon 4 to become low resistance by diffusion. After that, it is patterned to form the gate electrode 6. Then, PSG 7 is formed at the n-type ch transistor part and after forming PSG 8 on the whole surface, the source and drain regions are formed by diffusion.
JP62244972A 1987-09-28 1987-09-28 Semiconductor device Pending JPS6484746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62244972A JPS6484746A (en) 1987-09-28 1987-09-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62244972A JPS6484746A (en) 1987-09-28 1987-09-28 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6484746A true JPS6484746A (en) 1989-03-30

Family

ID=17126689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62244972A Pending JPS6484746A (en) 1987-09-28 1987-09-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6484746A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6060364A (en) * 1999-03-02 2000-05-09 Advanced Micro Devices, Inc. Fast Mosfet with low-doped source/drain

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5972759A (en) * 1982-10-20 1984-04-24 Toshiba Corp Semiconductor device and manufacture thereof
JPS59150479A (en) * 1982-12-21 1984-08-28 ノ−ザン・テレコム・リミテツド Laminated mos element with mutual coupler of polysilicon
JPS60133758A (en) * 1983-12-21 1985-07-16 Seiko Epson Corp Manufacture of mos type semiconductor device
JPS61156858A (en) * 1984-12-28 1986-07-16 Nec Corp Manufacture of cmos fet

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5972759A (en) * 1982-10-20 1984-04-24 Toshiba Corp Semiconductor device and manufacture thereof
JPS59150479A (en) * 1982-12-21 1984-08-28 ノ−ザン・テレコム・リミテツド Laminated mos element with mutual coupler of polysilicon
JPS60133758A (en) * 1983-12-21 1985-07-16 Seiko Epson Corp Manufacture of mos type semiconductor device
JPS61156858A (en) * 1984-12-28 1986-07-16 Nec Corp Manufacture of cmos fet

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6060364A (en) * 1999-03-02 2000-05-09 Advanced Micro Devices, Inc. Fast Mosfet with low-doped source/drain
US6238960B1 (en) 1999-03-02 2001-05-29 Advanced Micro Devices, Inc. Fast MOSFET with low-doped source/drain

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