JPS647518A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS647518A JPS647518A JP16107987A JP16107987A JPS647518A JP S647518 A JPS647518 A JP S647518A JP 16107987 A JP16107987 A JP 16107987A JP 16107987 A JP16107987 A JP 16107987A JP S647518 A JPS647518 A JP S647518A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- silica film
- heat treatment
- different
- film layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To shorten an embedded layer forming process by a method wherein the first and the second silica film layer, having different densities of impurities contained, are continuously formed on the surface of a semiconductor substrate in such a manner that they come in contact with different position with each other on the surface of the semiconductor substrate. CONSTITUTION:The first and the second silica film layers 5 and 6, having different densities of impurities, are continuously formed on the surface of a semiconductor substrate 1 contacting the different positions with each other, and a heat treatment is conducted subsequently. When a heat treatment is conducted after the first and the second silica film layers 5 and 6 have been formed on the surface of the semiconductor substrate 5 as above-mentioned, embedded layers 7 and 8 having different impurity density, namely, high density and low density, can be formed by a heat treatment simultaneously by conducting impurity diffusion from the first and the second silica film layers 5 and 6. As a result, the embedded layer forming process can be shortened.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16107987A JPS647518A (en) | 1987-06-30 | 1987-06-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16107987A JPS647518A (en) | 1987-06-30 | 1987-06-30 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS647518A true JPS647518A (en) | 1989-01-11 |
Family
ID=15728227
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16107987A Pending JPS647518A (en) | 1987-06-30 | 1987-06-30 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS647518A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1122841A1 (en) * | 1998-09-17 | 2001-08-08 | Matsushita Electric Industrial Co., Ltd. | Process for producing nitride semiconductor device |
WO2006117980A1 (en) * | 2005-04-26 | 2006-11-09 | Shin-Etsu Handotai Co., Ltd. | Solar cell manufacturing method, solar cell, and semiconductor device manufacturing method |
-
1987
- 1987-06-30 JP JP16107987A patent/JPS647518A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1122841A1 (en) * | 1998-09-17 | 2001-08-08 | Matsushita Electric Industrial Co., Ltd. | Process for producing nitride semiconductor device |
WO2006117980A1 (en) * | 2005-04-26 | 2006-11-09 | Shin-Etsu Handotai Co., Ltd. | Solar cell manufacturing method, solar cell, and semiconductor device manufacturing method |
JP2006310373A (en) * | 2005-04-26 | 2006-11-09 | Shin Etsu Handotai Co Ltd | Solar cell manufacturing method, solar cell and semiconductor device manufacturing method |
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