JPS54150074A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS54150074A
JPS54150074A JP5917778A JP5917778A JPS54150074A JP S54150074 A JPS54150074 A JP S54150074A JP 5917778 A JP5917778 A JP 5917778A JP 5917778 A JP5917778 A JP 5917778A JP S54150074 A JPS54150074 A JP S54150074A
Authority
JP
Japan
Prior art keywords
diffusion
semiconductor device
layer
sio
minutes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5917778A
Other languages
Japanese (ja)
Inventor
Motonobu Futagami
Keiko Tsujimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP5917778A priority Critical patent/JPS54150074A/en
Publication of JPS54150074A publication Critical patent/JPS54150074A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To reduce the lamination defect by giving the B diffusion from the main surface opposite to the surface where the semiconductor device is formed.
CONSTITUTION: SiO22 is laminated on Si substrate 1, and layer 2 on back surface 1b where no element is formed is removed. And then the B diffusion is given for 10 minutes at about 1000°C to form diffusion layer 3 featuring the surface density of 1020cm-3. Then CVDSiO24 is coated to prevent the rediffusion outside B. With the treatment of about 5 minutes at 1200°C higher than the B diffusion, the lamination defect occurring under the SiO2 layer on surface 1a can be eliminated. Thus, a good semiconductor device can be obtained by forming the element on surface 1a. The ion injection method is also available, and the heat treatment can also be carried out in the inactive gas in the course of the manufacturing processes.
COPYRIGHT: (C)1979,JPO&Japio
JP5917778A 1978-05-18 1978-05-18 Manufacture of semiconductor device Pending JPS54150074A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5917778A JPS54150074A (en) 1978-05-18 1978-05-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5917778A JPS54150074A (en) 1978-05-18 1978-05-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS54150074A true JPS54150074A (en) 1979-11-24

Family

ID=13105845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5917778A Pending JPS54150074A (en) 1978-05-18 1978-05-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS54150074A (en)

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