JPS6442146A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS6442146A JPS6442146A JP19729787A JP19729787A JPS6442146A JP S6442146 A JPS6442146 A JP S6442146A JP 19729787 A JP19729787 A JP 19729787A JP 19729787 A JP19729787 A JP 19729787A JP S6442146 A JPS6442146 A JP S6442146A
- Authority
- JP
- Japan
- Prior art keywords
- cell
- wiring
- wiring part
- buffer
- logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11898—Input and output buffer/driver structures
Abstract
PURPOSE:To increase an operation speed by shortening a length of a wiring part and to prevent a corruption of a waveform of a signal by replacing a through cell with a buffer if the occasion arises. CONSTITUTION:In a logic circuit where a logic gate region is formed by automatically arranging a beforehand prepared logic cell and said logic cell is designed by executing an automatic wiring operation by using a wiring region, a through cell where a wiring part 1 connecting logic cells 2 and 3 crossing a chip is passed is replaced with a buffer 4. The wiring part is divided into wiring parts 11 and 12 by using the buffer 4. Even when the wiring part does not pass the through cell near a point where the wiring part to be divided is to be divided, the through cell near the point is replaced by a buffer cell and the wiring parts are connected; by this setup, a length of the wiring part can be shortened; it is possible to prevent a delay in a signal and a corruption of a waveform of the signal which are cause because the length of the wiring part is too long.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62197297A JP2693448B2 (en) | 1987-08-08 | 1987-08-08 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62197297A JP2693448B2 (en) | 1987-08-08 | 1987-08-08 | Semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6442146A true JPS6442146A (en) | 1989-02-14 |
JP2693448B2 JP2693448B2 (en) | 1997-12-24 |
Family
ID=16372118
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62197297A Expired - Lifetime JP2693448B2 (en) | 1987-08-08 | 1987-08-08 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2693448B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5212107A (en) * | 1991-01-31 | 1993-05-18 | Hitachi, Ltd. | Wiring method for semiconductor integrated circuits |
US7459724B2 (en) | 1994-06-02 | 2008-12-02 | Semiconductor Energy Laboratory Co., Ltd. | Active matrix display and electrooptical device |
US8026537B2 (en) | 2003-01-20 | 2011-09-27 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit having an oblique global signal wiring and semiconductor integrated circuit wiring method |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57190343A (en) * | 1981-05-20 | 1982-11-22 | Hitachi Ltd | Semiconductor integrated circuit |
JPS6261343A (en) * | 1985-09-11 | 1987-03-18 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
JPS62140430A (en) * | 1985-12-16 | 1987-06-24 | Toshiba Corp | Wiring method for semiconductor integrated circuit |
-
1987
- 1987-08-08 JP JP62197297A patent/JP2693448B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57190343A (en) * | 1981-05-20 | 1982-11-22 | Hitachi Ltd | Semiconductor integrated circuit |
JPS6261343A (en) * | 1985-09-11 | 1987-03-18 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
JPS62140430A (en) * | 1985-12-16 | 1987-06-24 | Toshiba Corp | Wiring method for semiconductor integrated circuit |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5212107A (en) * | 1991-01-31 | 1993-05-18 | Hitachi, Ltd. | Wiring method for semiconductor integrated circuits |
US7459724B2 (en) | 1994-06-02 | 2008-12-02 | Semiconductor Energy Laboratory Co., Ltd. | Active matrix display and electrooptical device |
US8026537B2 (en) | 2003-01-20 | 2011-09-27 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit having an oblique global signal wiring and semiconductor integrated circuit wiring method |
Also Published As
Publication number | Publication date |
---|---|
JP2693448B2 (en) | 1997-12-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |