JPS6427096A - Microcomputer with built-in eeprom - Google Patents

Microcomputer with built-in eeprom

Info

Publication number
JPS6427096A
JPS6427096A JP18385787A JP18385787A JPS6427096A JP S6427096 A JPS6427096 A JP S6427096A JP 18385787 A JP18385787 A JP 18385787A JP 18385787 A JP18385787 A JP 18385787A JP S6427096 A JPS6427096 A JP S6427096A
Authority
JP
Japan
Prior art keywords
cpu
rom
processing
writing
interruption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18385787A
Other languages
Japanese (ja)
Inventor
Hajime Iizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18385787A priority Critical patent/JPS6427096A/en
Publication of JPS6427096A publication Critical patent/JPS6427096A/en
Pending legal-status Critical Current

Links

Landscapes

  • Microcomputers (AREA)
  • Read Only Memory (AREA)
  • Executing Machine-Instructions (AREA)
  • Stored Programmes (AREA)

Abstract

PURPOSE:To enable a CPU to concentrate on the program processing other than that is executes a processing without being conscious of the confirmation of an EEPROM writing processing completion flag by giving a writing address and data to a control circuit in response to an interruption from the control circuit with a data processing part. CONSTITUTION:When the writing processing of an EEPROM 13 is completed, the ROM 13 sends a signal 20 to request for the interruption through a control line to a CPU 12. On the other hand, the CPU 12 confirms that it is the interruption of the ROM 13, and when the CPU 12 can receive it, the CPU 12 interrupts other data processing and sends a signal 21 to receive the interruption through the control line to the ROM 13. Thus, the CPU 12 confirms that the writing processing of the ROM 13 is completed. In addition, the CPU 12 recognizes that the ROM 13 is ready to accept a next data processing. Thus, even while the ROM 13 executes writing-processing, the CPU 12 does not need to be always conscious of the writing-processing completion flag of the ROM 13, or to confirm it at any time. Thus, the CPU 13 can concentrate on other arithmetic and logical processings, etc.
JP18385787A 1987-07-23 1987-07-23 Microcomputer with built-in eeprom Pending JPS6427096A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18385787A JPS6427096A (en) 1987-07-23 1987-07-23 Microcomputer with built-in eeprom

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18385787A JPS6427096A (en) 1987-07-23 1987-07-23 Microcomputer with built-in eeprom

Publications (1)

Publication Number Publication Date
JPS6427096A true JPS6427096A (en) 1989-01-30

Family

ID=16143038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18385787A Pending JPS6427096A (en) 1987-07-23 1987-07-23 Microcomputer with built-in eeprom

Country Status (1)

Country Link
JP (1) JPS6427096A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5956749A (en) * 1996-05-30 1999-09-21 Nec Corporation Data back-up system using nonvolatile read/write memory

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61123096A (en) * 1984-11-20 1986-06-10 Fujitsu Ltd Nonvolatile semiconductor storage device
JPS6354642A (en) * 1986-08-25 1988-03-09 Nec Corp Memory controlling circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61123096A (en) * 1984-11-20 1986-06-10 Fujitsu Ltd Nonvolatile semiconductor storage device
JPS6354642A (en) * 1986-08-25 1988-03-09 Nec Corp Memory controlling circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5956749A (en) * 1996-05-30 1999-09-21 Nec Corporation Data back-up system using nonvolatile read/write memory

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