JPS5635254A - Processor back-up system - Google Patents

Processor back-up system

Info

Publication number
JPS5635254A
JPS5635254A JP11000079A JP11000079A JPS5635254A JP S5635254 A JPS5635254 A JP S5635254A JP 11000079 A JP11000079 A JP 11000079A JP 11000079 A JP11000079 A JP 11000079A JP S5635254 A JPS5635254 A JP S5635254A
Authority
JP
Japan
Prior art keywords
cpu1
mode
collation
cpu
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11000079A
Other languages
Japanese (ja)
Other versions
JPS5843775B2 (en
Inventor
Yutaka Wakasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Yokogawa Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp, Yokogawa Electric Works Ltd filed Critical Yokogawa Hokushin Electric Corp
Priority to JP54110000A priority Critical patent/JPS5843775B2/en
Publication of JPS5635254A publication Critical patent/JPS5635254A/en
Publication of JPS5843775B2 publication Critical patent/JPS5843775B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE: To enhance the reliability of the processor back-up system and also ensure an effective use of the function of each CPU, by giving the dual working to the system with the specified task requiring the back-up and then executing process by each CPU for the task requiring no back-up respectively.
CONSTITUTION: The CPU1 and 3 of the processor system A and B execute usually the different tasks TA and TB and in a quite independent way. Now if the synchronous interruption is produced to secure the synchronous mode S, both the CPU1 and 3 execute the synchronized and common specified task TS. Under the mode S, the common input/output unit 10 or 11 receives an access. And thus the accesses from the CPU1 and 3 receive a collation by the bus collating circuit 72 and along with the address information and the data information. And only a coincidence is obtained through the collation, an access is given to the unit 10 or 11. Then the back-up process is carried out in the dual mode and by the CPU1 and 3. And an individual process is carried out when the mode S is cancelled.
COPYRIGHT: (C)1981,JPO&Japio
JP54110000A 1979-08-29 1979-08-29 Processor backup system Expired JPS5843775B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54110000A JPS5843775B2 (en) 1979-08-29 1979-08-29 Processor backup system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54110000A JPS5843775B2 (en) 1979-08-29 1979-08-29 Processor backup system

Publications (2)

Publication Number Publication Date
JPS5635254A true JPS5635254A (en) 1981-04-07
JPS5843775B2 JPS5843775B2 (en) 1983-09-29

Family

ID=14524548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54110000A Expired JPS5843775B2 (en) 1979-08-29 1979-08-29 Processor backup system

Country Status (1)

Country Link
JP (1) JPS5843775B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041163A (en) * 1983-08-16 1985-03-04 Nec Corp Synchronous operating method of duplex microprocessor
JPS6364134A (en) * 1986-09-04 1988-03-22 Matsushita Commun Ind Co Ltd Network system stopping system
JPH03278238A (en) * 1990-03-28 1991-12-09 Nec Corp Mutual hot stand-by system
US6334194B1 (en) 1997-11-07 2001-12-25 Nec Corporation Fault tolerant computer employing double-redundant structure

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6118043B2 (en) * 2012-07-18 2017-04-19 矢崎総業株式会社 Display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6041163A (en) * 1983-08-16 1985-03-04 Nec Corp Synchronous operating method of duplex microprocessor
JPS6364134A (en) * 1986-09-04 1988-03-22 Matsushita Commun Ind Co Ltd Network system stopping system
JPH03278238A (en) * 1990-03-28 1991-12-09 Nec Corp Mutual hot stand-by system
US6334194B1 (en) 1997-11-07 2001-12-25 Nec Corporation Fault tolerant computer employing double-redundant structure

Also Published As

Publication number Publication date
JPS5843775B2 (en) 1983-09-29

Similar Documents

Publication Publication Date Title
JPS57164340A (en) Information processing method
JPS5635254A (en) Processor back-up system
JPS5622160A (en) Data processing system having additional processor
JPS54107647A (en) Data processor
JPS55140923A (en) Information processing system
JPS5696337A (en) Resource control system
JPS5465452A (en) Data process system containing false input/output device region
JPS5464944A (en) Buffer invalidating system for multi-cpu system
JPS5617450A (en) Data collection system
JPS5617441A (en) Program interruption system
JPS55113182A (en) Virtual computer system with tlb
JPS54137256A (en) Multi-processor equipment
JPS5696353A (en) Multiprocessor control device
JPS55118140A (en) Synchronous control method for analog input/output signal
JPS5278334A (en) Program sequence check system
JPS5394836A (en) Data process system
JPS5717058A (en) Control system of microprogram
JPS5563423A (en) Data transfer system
JPS54151330A (en) Information processor
JPS55108068A (en) Memory control system
JPS5534752A (en) Common access unit
JPS5523571A (en) Error processing system of data processing unit
JPS5561858A (en) Central operation control unit
JPS54543A (en) Computer composite system
JPS55105723A (en) Data input circuit