JPS5696353A - Multiprocessor control device - Google Patents

Multiprocessor control device

Info

Publication number
JPS5696353A
JPS5696353A JP16302279A JP16302279A JPS5696353A JP S5696353 A JPS5696353 A JP S5696353A JP 16302279 A JP16302279 A JP 16302279A JP 16302279 A JP16302279 A JP 16302279A JP S5696353 A JPS5696353 A JP S5696353A
Authority
JP
Japan
Prior art keywords
access
multispace
addresses
data memory
maxb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16302279A
Other languages
Japanese (ja)
Inventor
Hiroo Kikuchihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16302279A priority Critical patent/JPS5696353A/en
Publication of JPS5696353A publication Critical patent/JPS5696353A/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)

Abstract

PURPOSE: To facilitate a program formation, by decoding an address signal from the CPU in a multiprocessor device which can access a shared data memory.
CONSTITUTION: When CPUs 2A and 2B execute respectively instructions which access data memory 4, addresses are output onto address busses 11A and 11B and are given to multispace access signal generators 12A and 12B; and if addresses on address busses 11A and 11B indicate a shared memory space of data memory 4, addresses are decoded immediately and are transmitted to multibus control circuit 5 as multispace access signals MAXa and MAXb. When receiving multispace access signals MAXa and MAXb, multibus control circuit 5 outputs an access permission signal, and thus, CPUs 2A and 2B can access shared memory 4.
COPYRIGHT: (C)1981,JPO&Japio
JP16302279A 1979-12-12 1979-12-12 Multiprocessor control device Pending JPS5696353A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16302279A JPS5696353A (en) 1979-12-12 1979-12-12 Multiprocessor control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16302279A JPS5696353A (en) 1979-12-12 1979-12-12 Multiprocessor control device

Publications (1)

Publication Number Publication Date
JPS5696353A true JPS5696353A (en) 1981-08-04

Family

ID=15765693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16302279A Pending JPS5696353A (en) 1979-12-12 1979-12-12 Multiprocessor control device

Country Status (1)

Country Link
JP (1) JPS5696353A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60159954A (en) * 1984-01-31 1985-08-21 Fujitsu Ltd Memory controlling system
WO2004036416A1 (en) * 2002-10-18 2004-04-29 Tops Systems Corporation Processor having multi-bank register and processor control method
JP2007052811A (en) * 2006-10-23 2007-03-01 Tops Systems:Kk Processor having multi-bank register and control method of processor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60159954A (en) * 1984-01-31 1985-08-21 Fujitsu Ltd Memory controlling system
WO2004036416A1 (en) * 2002-10-18 2004-04-29 Tops Systems Corporation Processor having multi-bank register and processor control method
JPWO2004036416A1 (en) * 2002-10-18 2006-02-16 株式会社トプスシステムズ Processor having multi-bank register and method for controlling processor
JP2007052811A (en) * 2006-10-23 2007-03-01 Tops Systems:Kk Processor having multi-bank register and control method of processor

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