JPS55116124A - Information processor - Google Patents
Information processorInfo
- Publication number
- JPS55116124A JPS55116124A JP2359679A JP2359679A JPS55116124A JP S55116124 A JPS55116124 A JP S55116124A JP 2359679 A JP2359679 A JP 2359679A JP 2359679 A JP2359679 A JP 2359679A JP S55116124 A JPS55116124 A JP S55116124A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- circuit
- access
- dma
- memory block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bus Control (AREA)
Abstract
PURPOSE: To make it possible to lessen the reduction of the processing speed of CPU by enabling access from CPU to the 2nd memory block while a DMA circuit is attaining access to the 1st memory block.
CONSTITUTION: Memory block MB is divided into MB(A)5 which is not accessed by DMA circuit 3, and MB(B)6 accessed, and the bus constitution is also divided, corresponding to those MBs, into bus (A)7 connecting CPU1 to MB(A)5 and bus (B)8 connecting circuit 3 to MB(B)6. Next, when circuit 3 sends DMA request 13 and its permission signal is obtained, bus switch 9 disconnects bus (A)7 from bus (B)8 while DMA operation 3 is started. As a result, since circuit 3 attains access to MB(B)6 by using only bus (B)8, CPU1 can read and write MB(A)5 even in this access period by using bus (A)7.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2359679A JPS55116124A (en) | 1979-03-01 | 1979-03-01 | Information processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2359679A JPS55116124A (en) | 1979-03-01 | 1979-03-01 | Information processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55116124A true JPS55116124A (en) | 1980-09-06 |
Family
ID=12114968
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2359679A Pending JPS55116124A (en) | 1979-03-01 | 1979-03-01 | Information processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55116124A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57109022A (en) * | 1980-12-26 | 1982-07-07 | Nec Corp | Control system for common signal bus |
JPS58195924A (en) * | 1982-05-11 | 1983-11-15 | Hitachi Ltd | Information signal processing device |
JPS59183447A (en) * | 1983-04-01 | 1984-10-18 | Iwatsu Electric Co Ltd | Fault monitor system |
JPS6165351A (en) * | 1984-09-06 | 1986-04-03 | Yokogawa Hokushin Electric Corp | Control system |
JPS61110250A (en) * | 1984-11-02 | 1986-05-28 | Hitachi Ltd | Data processing system provided with plural bus |
JPS63208965A (en) * | 1987-02-26 | 1988-08-30 | Nec Corp | Microcomputer |
JPH02143360A (en) * | 1988-11-24 | 1990-06-01 | Nec Corp | Dma transfer control circuit |
JPH0341544A (en) * | 1989-07-07 | 1991-02-22 | Hitachi Ltd | Data processor for multibus data transfer control system |
-
1979
- 1979-03-01 JP JP2359679A patent/JPS55116124A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57109022A (en) * | 1980-12-26 | 1982-07-07 | Nec Corp | Control system for common signal bus |
JPS58195924A (en) * | 1982-05-11 | 1983-11-15 | Hitachi Ltd | Information signal processing device |
JPS59183447A (en) * | 1983-04-01 | 1984-10-18 | Iwatsu Electric Co Ltd | Fault monitor system |
JPH0346855B2 (en) * | 1983-04-01 | 1991-07-17 | Iwatsu Electric Co Ltd | |
JPS6165351A (en) * | 1984-09-06 | 1986-04-03 | Yokogawa Hokushin Electric Corp | Control system |
JPS61110250A (en) * | 1984-11-02 | 1986-05-28 | Hitachi Ltd | Data processing system provided with plural bus |
JPS63208965A (en) * | 1987-02-26 | 1988-08-30 | Nec Corp | Microcomputer |
JPH02143360A (en) * | 1988-11-24 | 1990-06-01 | Nec Corp | Dma transfer control circuit |
JPH0341544A (en) * | 1989-07-07 | 1991-02-22 | Hitachi Ltd | Data processor for multibus data transfer control system |
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