JPS5663657A - Memory switching system - Google Patents

Memory switching system

Info

Publication number
JPS5663657A
JPS5663657A JP14008679A JP14008679A JPS5663657A JP S5663657 A JPS5663657 A JP S5663657A JP 14008679 A JP14008679 A JP 14008679A JP 14008679 A JP14008679 A JP 14008679A JP S5663657 A JPS5663657 A JP S5663657A
Authority
JP
Japan
Prior art keywords
switching
control part
block
program
memory block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14008679A
Other languages
Japanese (ja)
Inventor
Takamichi Sano
Tetsuo Nagata
Michihiro Hamada
Yoshio Nakano
Naofumi Nagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP14008679A priority Critical patent/JPS5663657A/en
Publication of JPS5663657A publication Critical patent/JPS5663657A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To make it possible to make CPU execute the switching operation without requiring other processor, by driving the memory switching device in accordance with the instructions of the switching control part, and switching the memory block.
CONSTITUTION: It is assumed that when CPU2 is executing a program P1 in the individual control part A2 of the memory block M2, through the memory block switching unit EX, it has become necessary to shift it to a program P2 in the individual control part A2' of the memory block M2'. In this case, at first it is shifted from the program P1 to the switching request function EX, REQ in the switching control part A1 of the memory block M2. The processor CPU operates the unit EX by this function EX, REQ through the control line CNT, dataches CPU from the block M2, and CPU2 is connected to the block M2'. CPU2 accesses to the switching control part A1 of the block M2', subsequently shifts to the program P2 in the individual control part A2' of the block M2' and executes the processing, and therefore other processor is not required.
COPYRIGHT: (C)1981,JPO&Japio
JP14008679A 1979-10-30 1979-10-30 Memory switching system Pending JPS5663657A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14008679A JPS5663657A (en) 1979-10-30 1979-10-30 Memory switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14008679A JPS5663657A (en) 1979-10-30 1979-10-30 Memory switching system

Publications (1)

Publication Number Publication Date
JPS5663657A true JPS5663657A (en) 1981-05-30

Family

ID=15260623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14008679A Pending JPS5663657A (en) 1979-10-30 1979-10-30 Memory switching system

Country Status (1)

Country Link
JP (1) JPS5663657A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01216428A (en) * 1988-02-24 1989-08-30 Sanyo Electric Co Ltd System for executing subroutine of memory bank
JPH01292432A (en) * 1988-05-19 1989-11-24 Sanyo Electric Co Ltd Subroutine execution system for memory bank

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01216428A (en) * 1988-02-24 1989-08-30 Sanyo Electric Co Ltd System for executing subroutine of memory bank
JPH01292432A (en) * 1988-05-19 1989-11-24 Sanyo Electric Co Ltd Subroutine execution system for memory bank

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