JPS55164922A - Multimicrocomputer - Google Patents
MultimicrocomputerInfo
- Publication number
- JPS55164922A JPS55164922A JP7129479A JP7129479A JPS55164922A JP S55164922 A JPS55164922 A JP S55164922A JP 7129479 A JP7129479 A JP 7129479A JP 7129479 A JP7129479 A JP 7129479A JP S55164922 A JPS55164922 A JP S55164922A
- Authority
- JP
- Japan
- Prior art keywords
- common bus
- bus
- program processing
- access request
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To make the common bus efficient, by independently executing a part of the system, and providing the processor operated as the slave unit on the common bus with the program processing by itself as required.
CONSTITUTION: The local memory access detection circuit 39 detects the access request to the local memory 36 from the common bus 11, and FF40 permits or inhibits this access request. Further, the micro-CPU31 has the bus hold function and release the local bus with permitted access request to access the memory 36. Further, the processors 1...3 which can operate as slave on the common bus 11 suitably with the program processing are coupled with the common bus 11. Thus, a part of the system is independently executed and the units 1...3 which can operate as a slave unit on the common bus with the program processing by itself as required, allowing to make the common bus 11 efficient.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7129479A JPS55164922A (en) | 1979-06-08 | 1979-06-08 | Multimicrocomputer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7129479A JPS55164922A (en) | 1979-06-08 | 1979-06-08 | Multimicrocomputer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS55164922A true JPS55164922A (en) | 1980-12-23 |
Family
ID=13456508
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7129479A Pending JPS55164922A (en) | 1979-06-08 | 1979-06-08 | Multimicrocomputer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55164922A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS582922A (en) * | 1981-06-18 | 1983-01-08 | ザ・ベンデイツクス・コ−ポレ−シヨン | Buffer for and method of exchanging data between units and computer |
| JPS59501763A (en) * | 1982-09-30 | 1984-10-18 | ウエスタ−ン エレクトリツク カムパニ−，インコ−ポレ−テツド | Deadlock detection/resolution method |
| JPS60103476A (en) * | 1983-11-11 | 1985-06-07 | Toshiba Corp | Bus interface device |
| JPS60254272A (en) * | 1984-05-17 | 1985-12-14 | テキサス インスツルメンツ インコーポレイテツド | Multi-processor |
| JPS6143370A (en) * | 1984-08-03 | 1986-03-01 | インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション | Multiplex processing system |
| US6101584A (en) * | 1996-11-05 | 2000-08-08 | Mitsubishi Denki Kabushiki Kaisha | Computer system and semiconductor device on one chip including a memory and central processing unit for making interlock access to the memory |
-
1979
- 1979-06-08 JP JP7129479A patent/JPS55164922A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS582922A (en) * | 1981-06-18 | 1983-01-08 | ザ・ベンデイツクス・コ−ポレ−シヨン | Buffer for and method of exchanging data between units and computer |
| JPS59501763A (en) * | 1982-09-30 | 1984-10-18 | ウエスタ−ン エレクトリツク カムパニ−，インコ−ポレ−テツド | Deadlock detection/resolution method |
| JPS60103476A (en) * | 1983-11-11 | 1985-06-07 | Toshiba Corp | Bus interface device |
| JPS60254272A (en) * | 1984-05-17 | 1985-12-14 | テキサス インスツルメンツ インコーポレイテツド | Multi-processor |
| JPS6143370A (en) * | 1984-08-03 | 1986-03-01 | インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション | Multiplex processing system |
| JPH0452982B2 (en) * | 1984-08-03 | 1992-08-25 | Intaanashonaru Bijinesu Mashiinzu Corp | |
| US6101584A (en) * | 1996-11-05 | 2000-08-08 | Mitsubishi Denki Kabushiki Kaisha | Computer system and semiconductor device on one chip including a memory and central processing unit for making interlock access to the memory |
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