JPS641933B2 - - Google Patents

Info

Publication number
JPS641933B2
JPS641933B2 JP54117699A JP11769979A JPS641933B2 JP S641933 B2 JPS641933 B2 JP S641933B2 JP 54117699 A JP54117699 A JP 54117699A JP 11769979 A JP11769979 A JP 11769979A JP S641933 B2 JPS641933 B2 JP S641933B2
Authority
JP
Japan
Prior art keywords
layer
type
impurity
conductivity type
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54117699A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5640256A (en
Inventor
Katsuhiro Tsukamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11769979A priority Critical patent/JPS5640256A/ja
Publication of JPS5640256A publication Critical patent/JPS5640256A/ja
Publication of JPS641933B2 publication Critical patent/JPS641933B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H01L21/7621—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region the recessed region having a shape other than rectangular, e.g. rounded or oblique shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
JP11769979A 1979-09-11 1979-09-11 Manufacture of semiconductor device Granted JPS5640256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11769979A JPS5640256A (en) 1979-09-11 1979-09-11 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11769979A JPS5640256A (en) 1979-09-11 1979-09-11 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5640256A JPS5640256A (en) 1981-04-16
JPS641933B2 true JPS641933B2 (en:Method) 1989-01-13

Family

ID=14718107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11769979A Granted JPS5640256A (en) 1979-09-11 1979-09-11 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5640256A (en:Method)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58148325A (ja) * 1982-02-28 1983-09-03 Matsushita Electric Works Ltd 床暖房装置
JPS5990925A (ja) * 1982-11-17 1984-05-25 Matsushita Electronics Corp 半導体装置の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53117988A (en) * 1977-03-25 1978-10-14 Hitachi Ltd Production of bipolar ic

Also Published As

Publication number Publication date
JPS5640256A (en) 1981-04-16

Similar Documents

Publication Publication Date Title
JP2008135775A (ja) ＳｉＧｅバイポーラの歩留りを向上させるＣ打込み
JPH07118478B2 (ja) 横方向トランジスタの製造方法
JPS62155552A (ja) バイポ−ラ・トランジスタとｃｍｏｓトランジスタの同時製造方法
JPH05182980A (ja) ヘテロ接合バイポーラトランジスタ
US4472873A (en) Method for forming submicron bipolar transistors without epitaxial growth and the resulting structure
US5411898A (en) Method of manufacturing a complementary bipolar transistor
JPH0557741B2 (en:Method)
JPH0241170B2 (en:Method)
EP0221742B1 (en) Integrated circuit fabrication process for forming a bipolar transistor having extrinsic base regions
EP0118102B1 (en) Method for manufacturing a semiconductor device
JPS641933B2 (en:Method)
US5506156A (en) Method of fabricating bipolar transistor having high speed and MOS transistor having small size
JP3145694B2 (ja) 半導体装置
JP3326990B2 (ja) バイポーラトランジスタ及びその製造方法
JP3327658B2 (ja) 縦型バイポーラトランジスタの製造方法
JP2715494B2 (ja) 半導体装置の製造方法
JPS5984469A (ja) 半導体装置の製造方法
JPS5854502B2 (ja) 半導体装置の製造方法
JP2697631B2 (ja) 半導体装置の製造方法
JP3120441B2 (ja) 半導体装置およびその製造方法
JPS5837990B2 (ja) 半導体装置の製造方法
JPH0387059A (ja) 半導体集積回路及びその製造方法
JPH06333933A (ja) 半導体装置およびその製造方法
JPH05235009A (ja) 半導体集積回路装置の製造方法
JPS6350062A (ja) 半導体装置