JPS6418270A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6418270A
JPS6418270A JP62174543A JP17454387A JPS6418270A JP S6418270 A JPS6418270 A JP S6418270A JP 62174543 A JP62174543 A JP 62174543A JP 17454387 A JP17454387 A JP 17454387A JP S6418270 A JPS6418270 A JP S6418270A
Authority
JP
Japan
Prior art keywords
gates
memory cell
electrons
ejection
interval
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62174543A
Other languages
English (en)
Inventor
Eiji Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62174543A priority Critical patent/JPS6418270A/ja
Priority to US07/218,303 priority patent/US4907197A/en
Priority to KR1019880008710A priority patent/KR960012167B1/ko
Publication of JPS6418270A publication Critical patent/JPS6418270A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7883Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP62174543A 1987-07-13 1987-07-13 Semiconductor memory device Pending JPS6418270A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62174543A JPS6418270A (en) 1987-07-13 1987-07-13 Semiconductor memory device
US07/218,303 US4907197A (en) 1987-07-13 1988-07-12 Non-volatile semiconductor memory device
KR1019880008710A KR960012167B1 (ko) 1987-07-13 1988-07-13 반도체기억장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62174543A JPS6418270A (en) 1987-07-13 1987-07-13 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS6418270A true JPS6418270A (en) 1989-01-23

Family

ID=15980384

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62174543A Pending JPS6418270A (en) 1987-07-13 1987-07-13 Semiconductor memory device

Country Status (3)

Country Link
US (1) US4907197A (ja)
JP (1) JPS6418270A (ja)
KR (1) KR960012167B1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100309139B1 (ko) * 1994-12-16 2002-02-19 박종섭 비휘발성 메모리 소자 제조방법

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2600301B2 (ja) * 1988-06-28 1997-04-16 三菱電機株式会社 半導体記憶装置およびその製造方法
US5231041A (en) * 1988-06-28 1993-07-27 Mitsubishi Denki Kabushiki Kaisha Manufacturing method of an electrically programmable non-volatile memory device having the floating gate extending over the control gate
US5168335A (en) * 1988-07-15 1992-12-01 Texas Instruments Incorporated Electrically programmable, electrically erasable memory array cell with field plate
US5111430A (en) * 1989-06-22 1992-05-05 Nippon Telegraph And Telephone Corporation Non-volatile memory with hot carriers transmitted to floating gate through control gate
US5047816A (en) * 1990-08-21 1991-09-10 Vlsi Technology, Inc. Self-aligned dual-gate transistor
US7071060B1 (en) * 1996-02-28 2006-07-04 Sandisk Corporation EEPROM with split gate source side infection with sidewall spacers
US5477068A (en) * 1992-03-18 1995-12-19 Rohm Co., Ltd. Nonvolatile semiconductor memory device
JPH06120515A (ja) * 1992-10-09 1994-04-28 Oki Electric Ind Co Ltd 半導体不揮発性メモリのデータ書き込み及びデータ消去方法
US5471422A (en) * 1994-04-11 1995-11-28 Motorola, Inc. EEPROM cell with isolation transistor and methods for making and operating the same
KR100219117B1 (ko) * 1996-08-24 1999-09-01 구자홍 박막트랜지스터 액정표시장치 및 그 제조방법
US6534816B1 (en) 1999-03-24 2003-03-18 John M. Caywood Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
US20040021170A1 (en) * 1999-03-24 2004-02-05 Caywood John M. Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
US6384451B1 (en) 1999-03-24 2002-05-07 John Caywood Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
US6548347B2 (en) * 2001-04-12 2003-04-15 Micron Technology, Inc. Method of forming minimally spaced word lines
DE10138585A1 (de) * 2001-08-06 2003-03-06 Infineon Technologies Ag Speicherzelle
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141969A (en) * 1981-02-27 1982-09-02 Toshiba Corp Nonvolatile semiconductor memory
US4513397A (en) * 1982-12-10 1985-04-23 Rca Corporation Electrically alterable, nonvolatile floating gate memory device
US4590503A (en) * 1983-07-21 1986-05-20 Honeywell Inc. Electrically erasable programmable read only memory
US4608591A (en) * 1983-08-17 1986-08-26 Rca Corporation Electrically alterable programmable nonvolatile floating gate memory device
US4752912A (en) * 1985-05-14 1988-06-21 Xicor, Inc. Nonvolatile electrically alterable memory and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100309139B1 (ko) * 1994-12-16 2002-02-19 박종섭 비휘발성 메모리 소자 제조방법

Also Published As

Publication number Publication date
KR960012167B1 (ko) 1996-09-16
US4907197A (en) 1990-03-06
KR890003033A (ko) 1989-04-12

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