JPS6367358B2 - - Google Patents

Info

Publication number
JPS6367358B2
JPS6367358B2 JP54106367A JP10636779A JPS6367358B2 JP S6367358 B2 JPS6367358 B2 JP S6367358B2 JP 54106367 A JP54106367 A JP 54106367A JP 10636779 A JP10636779 A JP 10636779A JP S6367358 B2 JPS6367358 B2 JP S6367358B2
Authority
JP
Japan
Prior art keywords
electronic component
resin film
hole
circuit device
metal frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54106367A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5630782A (en
Inventor
Hiroaki Fujimoto
Masaharu Noyori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10636779A priority Critical patent/JPS5630782A/ja
Publication of JPS5630782A publication Critical patent/JPS5630782A/ja
Publication of JPS6367358B2 publication Critical patent/JPS6367358B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/24175—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
JP10636779A 1979-08-20 1979-08-20 Electronic circuit device and method of manufacturing same Granted JPS5630782A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10636779A JPS5630782A (en) 1979-08-20 1979-08-20 Electronic circuit device and method of manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10636779A JPS5630782A (en) 1979-08-20 1979-08-20 Electronic circuit device and method of manufacturing same

Publications (2)

Publication Number Publication Date
JPS5630782A JPS5630782A (en) 1981-03-27
JPS6367358B2 true JPS6367358B2 (enExample) 1988-12-26

Family

ID=14431747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10636779A Granted JPS5630782A (en) 1979-08-20 1979-08-20 Electronic circuit device and method of manufacturing same

Country Status (1)

Country Link
JP (1) JPS5630782A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2677842B2 (ja) * 1988-11-17 1997-11-17 ソニー株式会社 電子回路構造体の製造方法及び電子回路構造体

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5216166A (en) * 1975-07-29 1977-02-07 Matsushita Electric Ind Co Ltd Semiconductor device
JPS586951B2 (ja) * 1977-09-28 1983-02-07 松下電器産業株式会社 電子回路装置

Also Published As

Publication number Publication date
JPS5630782A (en) 1981-03-27

Similar Documents

Publication Publication Date Title
JPH0546981B2 (enExample)
WO1998043289A1 (fr) Composant a semi-conducteur, bande de support de couche et leur procede de fabrication
JPS62230027A (ja) 半導体装置の製造方法
US20020086514A1 (en) Fabrication method of wiring substrate for mounting semiconductor element and semiconductor device
JPH11163207A (ja) 半導体チップ搭載用基板の製造法および半導体装置
US5109601A (en) Method of marking a thin film package
JP4282777B2 (ja) 半導体装置用基板及び半導体装置の製造方法
JP3016910B2 (ja) 半導体モジュール構造
US4965700A (en) Thin film package for mixed bonding of chips
JP2001015868A (ja) 回路基板、パッケージ及びリードフレームとその製造方法
JP3529915B2 (ja) リードフレーム部材及びその製造方法
JPS6367358B2 (enExample)
JPS5823943B2 (ja) 絶縁体の貫通電極形成方法
JP2847949B2 (ja) 半導体装置
JP2001053191A (ja) 電極突起を導出した基板及びその製造方法
JPH0982835A (ja) 回路基板および多層回路基板
JPH10340925A (ja) 半導体装置およびその製造方法
JP2571960B2 (ja) 両面可撓性回路基板及びその製造法
JPS586951B2 (ja) 電子回路装置
JPH0638464B2 (ja) 薄い可撓性基板構造体
JPS5812757B2 (ja) 電子回路装置
JP3503229B2 (ja) 半導体装置およびその製造方法
JPH02150042A (ja) 混成集積回路
JP2819747B2 (ja) 半導体装置及びその実装構造及びその実装方法
JP2003282771A (ja) 放熱板付き配線基板