JPS6342097A - 多値論理記憶回路 - Google Patents

多値論理記憶回路

Info

Publication number
JPS6342097A
JPS6342097A JP61185652A JP18565286A JPS6342097A JP S6342097 A JPS6342097 A JP S6342097A JP 61185652 A JP61185652 A JP 61185652A JP 18565286 A JP18565286 A JP 18565286A JP S6342097 A JPS6342097 A JP S6342097A
Authority
JP
Japan
Prior art keywords
circuit
current mirror
current
load
mirror circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61185652A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0370320B2 (zh
Inventor
Yukio Yasuda
幸夫 安田
Shizuaki Zaima
戝満 鎮明
Norio Ikegami
池上 紀夫
Tetsuo Nakamura
哲郎 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP61185652A priority Critical patent/JPS6342097A/ja
Publication of JPS6342097A publication Critical patent/JPS6342097A/ja
Publication of JPH0370320B2 publication Critical patent/JPH0370320B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564Miscellaneous aspects
    • G11C2211/5645Multilevel memory with current-mirror arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
JP61185652A 1986-08-07 1986-08-07 多値論理記憶回路 Granted JPS6342097A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61185652A JPS6342097A (ja) 1986-08-07 1986-08-07 多値論理記憶回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61185652A JPS6342097A (ja) 1986-08-07 1986-08-07 多値論理記憶回路

Publications (2)

Publication Number Publication Date
JPS6342097A true JPS6342097A (ja) 1988-02-23
JPH0370320B2 JPH0370320B2 (zh) 1991-11-07

Family

ID=16174509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61185652A Granted JPS6342097A (ja) 1986-08-07 1986-08-07 多値論理記憶回路

Country Status (1)

Country Link
JP (1) JPS6342097A (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0756287A2 (en) * 1989-04-13 1997-01-29 SanDisk Corporation A memory sensing circuit employing multi-current mirrors
JPH0969293A (ja) * 1995-08-30 1997-03-11 Nec Corp 多値センスアンプ回路
EP1450373A1 (en) * 2003-02-21 2004-08-25 STMicroelectronics S.r.l. Phase change memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524746A (en) * 1975-06-30 1977-01-14 Fujitsu Ltd Semiconductor memory device
JPS60239994A (ja) * 1984-05-15 1985-11-28 Seiko Epson Corp 多値ダイナミツクランダムアクセスメモリ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524746A (en) * 1975-06-30 1977-01-14 Fujitsu Ltd Semiconductor memory device
JPS60239994A (ja) * 1984-05-15 1985-11-28 Seiko Epson Corp 多値ダイナミツクランダムアクセスメモリ

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0756287A2 (en) * 1989-04-13 1997-01-29 SanDisk Corporation A memory sensing circuit employing multi-current mirrors
EP0756287A3 (en) * 1989-04-13 1998-11-25 SanDisk Corporation A memory sensing circuit employing multi-current mirrors
JPH0969293A (ja) * 1995-08-30 1997-03-11 Nec Corp 多値センスアンプ回路
US7050328B2 (en) 2001-12-27 2006-05-23 Stmicroelectronics S.R.L. Phase change memory device
US7324371B2 (en) 2001-12-27 2008-01-29 Stmicroelectronics S.R.L. Method of writing to a phase change memory device
EP1450373A1 (en) * 2003-02-21 2004-08-25 STMicroelectronics S.r.l. Phase change memory device

Also Published As

Publication number Publication date
JPH0370320B2 (zh) 1991-11-07

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term