JPS63288351A - メモリ・ブロックの書き込み、読み出し回路 - Google Patents
メモリ・ブロックの書き込み、読み出し回路Info
- Publication number
- JPS63288351A JPS63288351A JP12241087A JP12241087A JPS63288351A JP S63288351 A JPS63288351 A JP S63288351A JP 12241087 A JP12241087 A JP 12241087A JP 12241087 A JP12241087 A JP 12241087A JP S63288351 A JPS63288351 A JP S63288351A
- Authority
- JP
- Japan
- Prior art keywords
- block
- memory
- address
- signal
- counter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 title claims abstract description 113
- 230000002457 bidirectional effect Effects 0.000 claims description 21
- 101100004933 Arabidopsis thaliana CYP79F1 gene Proteins 0.000 abstract description 7
- 230000000694 effects Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 2
- 101001064282 Homo sapiens Platelet-activating factor acetylhydrolase IB subunit beta Proteins 0.000 description 1
- 101100509792 Oncorhynchus mykiss tck1 gene Proteins 0.000 description 1
- 102100030655 Platelet-activating factor acetylhydrolase IB subunit beta Human genes 0.000 description 1
- 238000011990 functional testing Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003936 working memory Effects 0.000 description 1
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12241087A JPS63288351A (ja) | 1987-05-21 | 1987-05-21 | メモリ・ブロックの書き込み、読み出し回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12241087A JPS63288351A (ja) | 1987-05-21 | 1987-05-21 | メモリ・ブロックの書き込み、読み出し回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63288351A true JPS63288351A (ja) | 1988-11-25 |
| JPH0562787B2 JPH0562787B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-09-09 |
Family
ID=14835116
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12241087A Granted JPS63288351A (ja) | 1987-05-21 | 1987-05-21 | メモリ・ブロックの書き込み、読み出し回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63288351A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100496796B1 (ko) * | 1997-12-29 | 2005-09-15 | 삼성전자주식회사 | 반도체메모리장치의어드레스카운팅제어회로 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0771666A (ja) * | 1993-08-31 | 1995-03-17 | Nagase Chuko Kk | フランジ形管継手 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58112124A (ja) * | 1981-12-25 | 1983-07-04 | Fujitsu Ltd | Ｄｍａ制御方式 |
-
1987
- 1987-05-21 JP JP12241087A patent/JPS63288351A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58112124A (ja) * | 1981-12-25 | 1983-07-04 | Fujitsu Ltd | Ｄｍａ制御方式 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100496796B1 (ko) * | 1997-12-29 | 2005-09-15 | 삼성전자주식회사 | 반도체메모리장치의어드레스카운팅제어회로 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0562787B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-09-09 |