JPS6293963A - 樹脂封止形半導体集積回路装置 - Google Patents

樹脂封止形半導体集積回路装置

Info

Publication number
JPS6293963A
JPS6293963A JP60235716A JP23571685A JPS6293963A JP S6293963 A JPS6293963 A JP S6293963A JP 60235716 A JP60235716 A JP 60235716A JP 23571685 A JP23571685 A JP 23571685A JP S6293963 A JPS6293963 A JP S6293963A
Authority
JP
Japan
Prior art keywords
resin
integrated circuit
dielectric constant
chip
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60235716A
Other languages
English (en)
Inventor
Isamu Yamamoto
勇 山本
Takahiko Iida
隆彦 飯田
Eizo Ito
伊藤 栄三
Yuji Sawamori
沢森 雄治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60235716A priority Critical patent/JPS6293963A/ja
Publication of JPS6293963A publication Critical patent/JPS6293963A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は改良さnた樹脂封止形半導体集積回路装置に関
するものである。
〔従来の技術〕
第8図、第4図は夫々従来のモールド樹脂封止形半導体
集積回路装置の断面図であり、図において、(1)は半
導体集積回路チップ(以下ICチップという0)(2)
はこのICチップを封止する樹脂、(3)はICの入出
力の端子となるリード、(4)はICチップを載せるダ
イパッド(第4図のみ)、(5)はICチップのパッド
と、リードを@(的につなぐ、金属細線、(6)は熱抵
抗を良くするだめのヒートシンクである(第3図のみ)
次に、動作について説明する。
ICが動作するときに、リード(3)とICチップ(1
)、ダイパッド(4)またはヒートシンク(6)間の樹
脂の誘電率が低いためICのスイッチングが遅れる。
〔発明が解決しようとする問題点〕
従来のモールド樹脂封止形半導体集積回路装置は、以上
のように、h(成されているので、リード(3)とIC
チップ(1)、ダイパッド(4)またはヒートシンク(
6)間の樹脂の誘〜イ率が低いことにより、高速スイッ
チングに支障を生じる問題点があった。
この発明は、上記のような問題点を解消するためになさ
れたもので、高速スイッチングのできる樹脂封止形半導
体集積回路装置を得ることを目的とする。
〔問題点を解決するだめの手段〕
この発明に係る樹脂封止形半導体集積回路装置は、リー
ドとICチップダイパッド、またはヒートシンクの間に
誘電率の低い材質を介在させたものである。
〔作用〕
この発明における樹脂封止形半導体集積回路装置はリー
ドとlCチップ、ダイパッドまたは、ヒートシンクの間
に介在させた誘電率の低い材料により1高速スイツチン
グを可能とする。
〔発明の実施例〕
以下、この発明の一実施例を図について説明する。第1
図、第2図において、(1)はICチップ、(2)は樹
脂、(3)はリード、(4)はダイパッド、(5)は金
属細線、(7)はリード(3)とICチップ(1)また
はヒートシンク(6)間に介在し樹脂(2)よりも誘電
率の低い低誘電率部材である。
ICは前記低誘電率部材を設けることにより、高速スイ
ッチングが可能となる。
第2図は、低い誘電率の材質を、リード(3)とICチ
ップ(1)またはダイパッド(6)の間に低誘電率部材
(7)を介在させた他の実施例である。
なお上記低誘電率部材(7)は必ずしも樹脂(2)より
誘電率の低いものでなくとも、例えば多泡質にすること
により見掛の誘電率の低くした物質を使用することも可
能である。
〔発明の効果〕
以上のように、この発明によればリードとICチップ、
ダイパッド、またはヒートシンク間に樹脂のよりも誘電
率の低い物質を設けたので樹脂封止形半導体集積回路装
置の高速スイッチングが可能となる。
【図面の簡単な説明】
第1図は、この発明の一実施例になるモールド樹脂封止
形半導体集積回路装置を示す断面図、第2図はこの発明
の他の実施例を示す断面図、第3図と第4図は従来のモ
ールド樹脂封止形半導体集積回路装置を示す断面図であ
る。 (1)はチップ、(2)は樹脂、(3)はリード、(4
)はダイパッド、(5iは金属細線、(6)はヒートシ
ンク、(7)は低誘電率物質である。 図中同一符号は同一または相当部分を示す。

Claims (2)

    【特許請求の範囲】
  1. (1)樹脂封止形半導体集積装置に於て、樹脂により包
    囲された内部リードと集積回路チップあるいはこのチッ
    プを載置するダイパッドもしくはヒートシンクとの間に
    、前記樹脂封止形集積回路装置を構成する樹脂の誘電率
    よりも低い物質を介在させた事を特徴とする樹脂封止形
    半導体集積回路装置。
  2. (2)介在させた物質は、本来封止樹脂の誘電率よりも
    高いものであつても、多泡質とする事により、見掛の誘
    電率をモールド樹脂のそれより低いものとした物である
    ことを特徴とする特許請求の範囲第1項記載の樹脂封止
    形半導体集積回路装置。
JP60235716A 1985-10-21 1985-10-21 樹脂封止形半導体集積回路装置 Pending JPS6293963A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60235716A JPS6293963A (ja) 1985-10-21 1985-10-21 樹脂封止形半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60235716A JPS6293963A (ja) 1985-10-21 1985-10-21 樹脂封止形半導体集積回路装置

Publications (1)

Publication Number Publication Date
JPS6293963A true JPS6293963A (ja) 1987-04-30

Family

ID=16990167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60235716A Pending JPS6293963A (ja) 1985-10-21 1985-10-21 樹脂封止形半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS6293963A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6570247B1 (en) * 1997-12-30 2003-05-27 Intel Corporation Integrated circuit device having an embedded heat slug

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4979686A (ja) * 1972-12-07 1974-08-01

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4979686A (ja) * 1972-12-07 1974-08-01

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6570247B1 (en) * 1997-12-30 2003-05-27 Intel Corporation Integrated circuit device having an embedded heat slug

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