JPS6243230B2 - - Google Patents

Info

Publication number
JPS6243230B2
JPS6243230B2 JP11554481A JP11554481A JPS6243230B2 JP S6243230 B2 JPS6243230 B2 JP S6243230B2 JP 11554481 A JP11554481 A JP 11554481A JP 11554481 A JP11554481 A JP 11554481A JP S6243230 B2 JPS6243230 B2 JP S6243230B2
Authority
JP
Japan
Prior art keywords
processor
processing
processing request
response
identification code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11554481A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5816366A (ja
Inventor
Hideki Fukuoka
Kyoto Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11554481A priority Critical patent/JPS5816366A/ja
Publication of JPS5816366A publication Critical patent/JPS5816366A/ja
Publication of JPS6243230B2 publication Critical patent/JPS6243230B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
JP11554481A 1981-07-23 1981-07-23 プロセツサ間通信方式 Granted JPS5816366A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11554481A JPS5816366A (ja) 1981-07-23 1981-07-23 プロセツサ間通信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11554481A JPS5816366A (ja) 1981-07-23 1981-07-23 プロセツサ間通信方式

Publications (2)

Publication Number Publication Date
JPS5816366A JPS5816366A (ja) 1983-01-31
JPS6243230B2 true JPS6243230B2 (enrdf_load_stackoverflow) 1987-09-11

Family

ID=14665153

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11554481A Granted JPS5816366A (ja) 1981-07-23 1981-07-23 プロセツサ間通信方式

Country Status (1)

Country Link
JP (1) JPS5816366A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5960676A (ja) * 1982-09-30 1984-04-06 Fujitsu Ltd マルチプロセツサ方式

Also Published As

Publication number Publication date
JPS5816366A (ja) 1983-01-31

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