JPS6237859B2 - - Google Patents

Info

Publication number
JPS6237859B2
JPS6237859B2 JP55010291A JP1029180A JPS6237859B2 JP S6237859 B2 JPS6237859 B2 JP S6237859B2 JP 55010291 A JP55010291 A JP 55010291A JP 1029180 A JP1029180 A JP 1029180A JP S6237859 B2 JPS6237859 B2 JP S6237859B2
Authority
JP
Japan
Prior art keywords
line
input
data
output
line number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55010291A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56107662A (en
Inventor
Kyoshi Minemura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP1029180A priority Critical patent/JPS56107662A/ja
Publication of JPS56107662A publication Critical patent/JPS56107662A/ja
Publication of JPS6237859B2 publication Critical patent/JPS6237859B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
JP1029180A 1980-01-31 1980-01-31 Communication control equipment Granted JPS56107662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1029180A JPS56107662A (en) 1980-01-31 1980-01-31 Communication control equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1029180A JPS56107662A (en) 1980-01-31 1980-01-31 Communication control equipment

Publications (2)

Publication Number Publication Date
JPS56107662A JPS56107662A (en) 1981-08-26
JPS6237859B2 true JPS6237859B2 (enrdf_load_stackoverflow) 1987-08-14

Family

ID=11746187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1029180A Granted JPS56107662A (en) 1980-01-31 1980-01-31 Communication control equipment

Country Status (1)

Country Link
JP (1) JPS56107662A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5970333A (ja) * 1982-10-15 1984-04-20 Matsushita Electric Works Ltd 多重伝送システムのデ−タ受信器
JPS59109943A (ja) * 1982-12-15 1984-06-25 Hitachi Ltd 通信制御装置の回線処理制御方式

Also Published As

Publication number Publication date
JPS56107662A (en) 1981-08-26

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