JPS62282331A - Arithmetic processing unit - Google Patents

Abstract

PURPOSE:To attain high speed arithmetic processing by providing an instruction execution control means controlling the execution of an instruction code read next while referencing an execution inhibition flag set by a flag setting means so as to eliminate the access of an undesired instruction code and to decrease the program size. CONSTITUTION:An instruction analyzed by an instruction decoder 15 is sent/ received. Whether or not a sent/received instruction is a conditional instruction is judged, in case of YES, a control circuit 2 sets a flag F to an instruction inhibition flag 1 to complete the control. On the other hand, in case of a conventional instruction, whether or not the flag F is set is judged, and in case of YES, the control circuit 2 resets the flag F set in the instruction inhibition flag 1 and in case of NO, the sent/received instruction is executed. Thus, it is not required to write the condition branch instruction into the program, the program size is reduced and the processing speed is improved remarkably.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] □This invention relates to a microprocessor, etc. that reads instructions from a storage device such as a main memory and executes arithmetic processing according to the read instruction code. The present invention relates to an arithmetic processing device.

[Conventional technology]

Conventionally, in this type of arithmetic processing device, an instruction program, which is an execution procedure, is stored in the main memory, and the instruction program sequence in the main memory is sequentially read out from the address corresponding to the value held in the program counter and executed. ing.

A schematic block diagram of this conventional arithmetic processing device is shown in FIG.

In this figure, reference numeral 11 denotes a control circuit that collectively controls each part. 12 is an arithmetic unit (ALU) that performs arithmetic processing, and 13 is a program counter that stores the storage location of the next instruction to be read. 14 is an instruction register, 15
is an instruction decoder that analyzes the instructions in the instruction register 14. Reference numeral 16 is a memory address register, 17 is a memory data register, 18 is a memory control circuit, and 19 is a memory, which stores program instruction sequences and temporarily stores data generated during processing by the arithmetic processing unit.

Next, the operation of each part will be explained.

The program instruction string in the memory 19 normally stores the contents of the program counter 13 in the memory address register 16, and the memory control circuit 18 stores the contents of the program counter 13 in the memory address register 16.
The address data from 6 is sent, the corresponding data, that is, the program instruction is read into the memory data register 17, this instruction code is sent to the instruction register 14,
It is analyzed by the instruction decoder 15, and the analysis result is sent to the control circuit 11.
and executes processing according to the analysis results. At this time, the value of the program counter 13 is incremented by one after its contents are stored in the memory address register 16, and when the next instruction code is read, the value of the program counter 13 that is incremented by one is stored in the memory address register 16. It turns out.

In order to change the flow of the program depending on the conditions,
There is a conditional branch instruction that jumps when the condition is met.

That is, by changing the program counter]3, the read address of the instruction is changed and the flow of the program is changed.

In this way, the execution contents are changed based on the set conditions only by jumping. Therefore, the fourth
Assuming that the instructions are executed according to the steps shown in the figure,
If the conditions of step (1) are met, step (2)
It is necessary to individually create a program that executes instruction A, jumps to step (3), and executes instruction B if the condition of step (1) is not satisfied.

[Problem that the invention seeks to solve]

For this reason, jump instructions that are unnecessary from the point of view of the purpose to be executed are present, resulting in a problem that the program size inevitably increases. Furthermore, programming becomes difficult because a jump instruction with conditions opposite to the purpose of execution must be written. Furthermore, conventional advanced microprocessors increase processing speed by loading instruction code sequences to be executed sequentially from the storage device into the processor using free time on the address bus and data bus. Usually, when performing step (1) described above, the prefetched instruction code string is discarded, resulting in a problem of lowering the processing speed.

The present invention has been made to solve the above-mentioned problems.Before executing instruction codes that are sequentially read out, this invention holds flag information that identifies whether or not the instruction codes are being executed.
It is an object of the present invention to provide an arithmetic processing device that can eliminate unnecessary jump instruction accesses, shorten program size, and perform high-speed arithmetic processing by controlling the instruction execution.

[Means for solving problems]

The arithmetic processing device according to the present invention includes a flag setting means for analyzing instruction codes sequentially read from a storage means and setting an execution prohibition flag for prohibiting execution of the instruction code to be read next; The instruction execution control means controls the execution of the instruction code to be read next while referring to the prohibition flag.

[Effect]

In this invention, the instruction execution control means prohibits execution of the next instruction code to be read based on the setting state of the execution prohibition flag set by the flag setting means.

〔Example〕

FIG. 1 is a block diagram illustrating the configuration of an arithmetic processing device showing an embodiment of the present invention, and the same components as in FIG. 3 are given the same reference numerals.

In this figure, 1 is an instruction prohibition flag, which holds a flag FLAG that prohibits execution of the next instruction code to be read. Reference numeral 2 denotes a control circuit that also serves as an instruction execution control means of the present invention, and an instruction decoder that also serves as a flag setting means] 5 sets flag F in the instruction prohibition flag 1 based on the analyzed instruction, and then after reading the instruction code, Resets flag F that is currently being set.

Next, the operation shown in FIG. 1 will be explained with reference to FIG.

FIG. 2 is a flowchart illustrating the operation of the control circuit 2 shown in FIG. 1. Note that (1) to (7) indicate each step.

When the program stored in the memory 19 is read, the control circuit 2 initializes each part and resets the flag F set in the instruction prohibition flag 1 at that time. In this state,
A program instruction is read into the memory data register 17 and the instruction code is sent to the instruction register 14.

First, an instruction analyzed by the instruction decoder 15 is sent and received (
1) 0 Next, it is determined whether the command sent and received is a conditional command. 2) If YES, it is determined whether the unconditional condition is established. 3) If YES, the control is terminated. If NO, the control circuit 2 sets the 7-lag F to the instruction prohibition flag 1 (4) and ends the control.

On the other hand, if the judgment in step (2) is NO, that is, if it is a normal instruction, it is further judged whether the flag F is being set (5), and if YES, the control circuit 2 moves to step (6).
) is ignored and the flag F which is currently set to command prohibition flag 1 is reset (7). If No, the command sent and received in step (1) is executed (8) and the process proceeds to step (7).

In this way, instead of providing a conditional instruction, it is possible to eliminate the need for a conventional conditional branch instruction, and by writing a jump instruction after a conditional instruction, it is possible to execute the same function as when writing a conditional branch instruction. becomes.

〔Effect of the invention〕

As explained above, the present invention includes a flag setting means for analyzing instruction codes sequentially read from a storage means and setting an execution prohibition flag for prohibiting execution of the instruction code to be read next; Since an instruction execution control means is provided that controls the execution of the instruction code to be read next while referring to the prohibition flag, there is no need to write conditional branch instructions into the program, reducing the program size and significantly improving processing speed. .

Furthermore, since it is possible to specify whether or not all instructions are to be executed before the instruction is executed, program creation can be facilitated. Furthermore, it has many advantages, such as the ability to program special instruction sets, such as conditional branch instructions, as conditional execution of jump instructions.

[Brief explanation of the drawing]

FIG. 1 is a plot diagram explaining the configuration of an arithmetic processing device showing an embodiment of the present invention, FIG. 2 is a flowchart explaining the operation of the control circuit shown in FIG. 1, and FIG. A schematic block diagram of the processing device, FIG. 4 is a flowchart for explaining the operation of FIG. 3. In the figure, 1 is an instruction prohibition flag, and 2 is a control circuit. 15 is an instruction decoder. Figure 1 Figure 2 Figure 3

Claims (2)

[Claims] (1) In an arithmetic processing unit that sequentially reads instruction codes from a storage means and performs arithmetic processing based on the read instruction codes, it analyzes the instruction codes sequentially read from the storage means and prohibits execution of the next instruction code to be read. an execution prohibition flag set by the flag setting means; and an instruction execution control means that controls execution of an instruction code to be read next while referring to the execution prohibition flag set by the flag setting means. Processing equipment. (2) The arithmetic processing device according to claim 1, wherein the instruction execution control means resets the execution prohibition flag set by the flag setting means after prohibiting execution of the instruction.