JPS63282526A - System for controlling electronic computer - Google Patents

Abstract

PURPOSE:To speed up processing by comparing the contents of a jump destination address register with the contents of the execution address of an electronic computer every time an instruction is executed, and rewriting the contents of the execution address of the electronic computer into the contents of the jump destination address register when they match with each other and quitting the comparison thereafter. CONSTITUTION:A comparator 3 compares the contents of the jump destination address register 11 with the contents of an execution address register (PC) 2 every time an instruction is reset and a selecting circuit 7 selects the jump destination address register 12 to rewrite the contents of the execution address register (PC) 2. Further, while the flip-flop 5 is set, a PC update control part 6 updates the execution address in the execution address register (PC) 2 unless the coincidence between the addresses is obtained. When the flip-flop 5 is reset, the comparison processing is not performed. Consequently, the execution speed of the electronic computer is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electronic computer control system, and particularly to the function of a one-conditional branch instruction.

[Conventional technology]

Conventional electronic computer control systems for conditional branch instructions only branch when a condition is met, and in the case of a branch flow as shown in Figure 2, if the condition is met in judgment 21, processing 22 is skipped. However, in the case shown in FIG. 3, if it is written as a serial program, the result will be as shown in FIG. 4. That is, if the condition is satisfied in judgment 31, processing 32 is skipped and processing 33 is executed, and if the condition is not satisfied, another branch instruction must be executed after processing 32 is completed to skip processing 33. As a result, the program became complicated and became a factor that reduced the performance of electronic computers.

[Problem that the invention seeks to solve]

In the above-mentioned conventional computer control system, when executing a conditional branch instruction, the branch is only executed when the condition is met, so if the condition is met, the process 1 is performed.
If you want to perform process 2 when the condition is not met, there is a drawback that after performing process 2 when the condition is not met, you must use a further branch instruction to skip process 1.

Furthermore, this has the disadvantage of placing a burden on the programmer when creating a program with the flow described above.

SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic computer control method that can eliminate the above-mentioned drawbacks, increase the execution speed of an electronic computer, and improve program creation efficiency.

[Failure to solve the problem]

The computer control method of the present invention includes two jump destination address registers 1 and 2 that hold branch destination addresses, a comparator that compares the contents of the jump destination address register 2 and the contents of the execution address of the computer, When the condition is not satisfied in a conditional branch instruction, the comparator performs a comparison every time one instruction is executed, and when a match is detected, the execution address of the computer is rewritten to the contents of the jump destination address register 2, and thereafter. and control means for stopping the comparison by the comparator.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram partially showing an embodiment of an electronic computer to which the present invention is applied.

In Figure 1, 1 is an instruction register, 2 is an execution address register (PC), 3 is a comparator, 4 is a decoder, 5 is a flip-flop, 6 is a PC update control section, 7 is a selection circuit, 11 and 12 are jumpers. This is the destination address register.

In this example, when a conditional branch instruction is detected by the decoder 4, address A of instruction register 1 is set to jump destination address register IIK, and address B is set to jump destination address register 1.
Store in 2.

When the condition is satisfied, the contents of address A of instruction register 1 are selected by selection circuit 7, and execution address register 2 is rewritten.

When the condition is not satisfied, the flip-flop 5 is set. Also, the comparator 3 compares the contents of the jump destination address register 11 and the contents of the execution address register (PC) 2, and if they match, the flip 70 knob 5 is reset, and the selection circuit 7 selects the jump destination address register 12. Select and rewrite the contents of execution address register (PC) 2.

Also, while the slip-flop 5 is set, if the comparison does not match, the execution address register (PC
)2 is PCJ! The new control unit 6 updates the execution address. If the 7rip 70rub 5 is reset, these comparisons will not be processed.

〔Effect of the invention〕

As explained above, in the present invention, when executing a conditional branch instruction, if the condition is not satisfied, two branch destination addresses are held in two jump destination address registers, and thereafter, the jump destination address is stored every time one instruction is executed. The contents of register 1 and the contents of the execution address of the computer are compared, and if they match, the contents of the execution address of the computer are rewritten to the contents of the jump destination address register 52, and after that, the comparison is stopped and the processing is executed according to the conditions. If it is different, the effect is that the program becomes easier and the execution speed becomes faster.

[Brief explanation of drawings]

Fig. 1 is a block diagram partially showing an embodiment of an electronic computer to which the present invention is applied, Figs. 2 and 3 are flow charts showing the flow of conventional branch instructions, and Fig. 4 is the flow of Fig. 3. This is a flowchart showing the flow of a serial program. 1...Instruction register, 2...Execution address register, 3...Comparator, 4...
Decoder, 5, old...Flip 70 knob, 6...
・PC update control unit, 7...Selection circuit, 11.1
2... Destination address regime 3rd area

Claims (1)

[Claims] It has a jump destination address register 1 and a jump destination address register 2 that hold the branch destination address, and a comparator that compares the contents of the jump destination address register 1 and the contents of the execution address of the computer, If the condition is met, the execution address of the computer is rewritten to address 1 in the instruction register, and if the condition is not met, the two addresses in the instruction register are rewritten to the jump destination address register 1 and the jump destination. address register 2
Thereafter, the comparator performs a comparison every time one instruction is executed, and when a match is detected, the execution address of the computer is set to the content of the jump destination address register 2; An electronic computer control system comprising: control means for stopping comparison by a comparator.