JPS61241836A - Storage device - Google Patents

Abstract

PURPOSE:To improve the overall processing performance of a system by interpreting instructions and performing the arithmetic processing at a processor part while a storage device is performing an environment saving process. CONSTITUTION:A storage device 11 contains a register group 15 having the same contents as those of a register group 14 of a processor part 12. In an environment saving process at the part 12 a writing process is possible to a storage part from the group 15 of the device 11 without transferring the data to the device 11 from the group 14 of the part 12. Therefore the part 12 is not required to perform the transfer of data for environment saving. Then the part 12 can interpret and calculate the desired instructions after saving the environment. This improves the processing performance at the part 12.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of practical application) The present invention relates to a storage device, and particularly to a storage device for efficiently storing the contents of a register that holds 10 sets of a computer in a storage section. Regarding.

(Prior art and its problems) Lisp is a non-procedural programming language.

In prologue languages and the like, as part of the environment saving operation required when moving from the current processing state to the next processing state, there is a saving process in which a group of registers used by the processor section is stored in a storage device.

This evacuation work is also performed when switching processes or tasks. In particular, the environment is frequently saved in the Squirrel 11 prologue, which has a large impact on the processing performance of these languages.

As an example of evacuating the environment, rc [Written by Warren (Abstract Prologue Instructions Set)]
Technical Note 309 Artificial Intelligence Center, Nissrl Eye Internacional 1983J (D, H, D.

Warren @An Abstract
Pro ogInst-ruction Set″T
electrical note 309 Ar-ti
ficjal
r.

Center, SRI International
1983), page 3 of the
vironme-nts) and choice points
One example is the evacuation of points).

In conventional computers, the above-mentioned save operation is performed by the processor section, which manipulates the contents of the register and the C output to the storage destination address storage device, so that the contents of one register are stored in the storage device and this operation is repeated. The above-mentioned environment will be evacuated. In other words, when the processor section saves a group of registers, it simply transfers the contents of the registers to the storage device. The problem is that the air provided in the processing agent is not used effectively and high-speed processing cannot be performed.

(Object of the Invention) The purpose of the present invention is to eliminate all the problems of the conventional art, and to provide a storage device for quickly storing the contents of the registers of the processor section in the storage section of the storage device when saving the environment. It is about providing.

(Structure of the Invention) The storage device of the present invention includes a processor section that processes data, a storage section that stores a data processing program, and a copy register file that holds the same registers as various registers in the processor section. and a save flag provided corresponding to each register with a bit M equal to the number of registers in the copy register file, and a save flag corresponding to each register of the copy register file that needs to be transferred to the storage unit. and a means for sequentially writing the contents of the copy register that need to be transferred to the storage device into the storage unit, and after the writing is completed, a 1-reset in the save flag corresponding to the register of the copy register file. a storage control unit that writes to a register in the processor, and when a save flag bit corresponding to a register in the corresponding copy register file is set when the processor unit writes to a register in the processor, from the processor unit to the copy register file. This is done by completely inhibiting the writing of the data and stopping the processing of the processor section.

(Function/principle of the invention) The present invention stores a register group necessary for saving the environment among the register groups held by the processor section! ! It is also provided on the hardware side and holds all the same registers as the corresponding registers in the processor section. When saving the environment in the processor section, data from the register group of the storage device is stored in the storage section, rather than from the register group of the processor section. In this regard, the present invention enables the processor section to interpret instructions and perform arithmetic processing while the environment is being saved in the storage device, thereby improving the processing performance of the entire system.

(Example) Examples of the present invention will be described in detail below with reference to the drawings.

Figure 81!1 shows an embodiment of the present invention.
One embodiment of the present invention has a storage device 1n that includes a storage device 11 that can control data transfer and a processor section 12 that processes data; and a storage section 11 that stores C data and programs. The processor section 12 has a register file 14t which is a register group t' for temporarily holding state and data during data processing.

A register group 'f used when saving the environment from among the register files 14 held in the storage device 11 and the processor unit 12: Coby register file 1 to be held.
4, a save flag 16 provided with one bit corresponding to each register of the copy register file 15, a storage control unit 17 that controls data transfer processing using a microprogram, and an environment storage unit 13 The address register 18 has a function of holding and incrementing the save area address of the storage section 13 sent from the section 12. The processor unit 12 has a processor control unit 19t which controls data processing, and has a register copy command @20 which specifies a register group to be saved and instructs saving when saving the environment. When writing to a register in the register file 14 in the processor section 12, if the bit of the save flag 16 corresponding to the register is set via the register address line 35, the save incomplete flag 36 is turned ON. , A with register write polarization 34
A game) 21 is provided which prohibits processing by the processor 12 in order to perform ND processing. Furthermore, it is noted that the data line 37 from the evacuation state 2 lag 22 and the data line 37 from the processor section 12 indicate that the TTI device 11 is in a state where data is transferred from the copy register file 15 to the storage section 13 as an environment evacuation process.
A selector 2 selects either the data sent via the data line 38 or the data sent from the copy register file 15 via the data line 38 as the save state flag 22.
3t=has.

If the save state flag 22 indicates an access request 39 from the processor section 12 to the memory section 13 during a chain evacuation in which register contents are transferred from the copy register file 15 to the memory section 13, the processor Part 1
The processing in step 2 is prohibited.

It is used to store the bit pattern corresponding to the register group to be saved in the copy register file 15 in the save flag 16 when the storage control device 17 receives a register copy command sent via the register copy command line 2°. Ru.

FIG. 2 is a diagram for explaining the operation of the HB storage device and the processor unit in one embodiment of the present invention.
A) shows the state immediately before saving the environment, and FIG. 2+bl shows the state in the middle of saving the environment of the processor section 12. Referring to FIG. 2, the operation of this embodiment will be explained. Before saving the environment, the processor section 12 performs data processing. During the data processing, the register file 14 stores temporary data or state information. is written. At the same time as writing to this register file 14, the note t[! F. Write the same content as that written to the register file 14 to the corresponding register position of the copy register file 15 of the device 1 via the data line 31. This state 11t-g2 (a), (b) In this example, the same values a, b, and c are stored in corresponding register positions.

After completing a series of data processing in the processor section 12,
Start the operation to evacuate the entire environment. Register file 14
In the structure shown in FIG. 2, there are three registers Rk, R1,
In order to save the contents of RJ+1, processor unit 1
In step 2, a register copy command for transferring the contents of the three registers mentioned above to the storage unit 13 is sent via the register copy command line 20t. The order of the registers to be saved and the address of the register to be saved in the copy register file 15 are controlled by the storage control unit 170 microprogram. In this example, the save order is l
! R+2 in Figure 2. The order is RI1 and R1+1. The destination address "'n" is sent from the processor section 12 to the address register 18 to the storage section 13 via the address line 32t.
1n” is stored in the address register 18.

The storage control section 17 of the tXf device 11 [processor section 12
After receiving the register copy command t-ff sent from
A bit pattern indicating a register to be saved among the registers of the copy register file 15 is stored in the save flag 16 via the data line 40t. Figure 2 (in the example of al @0010...O1
l'' is stored in the save flag 16. These bit patterns differ depending on the type of copy command sent via the register copy command line 20t, and the bit patterns are given by the microinstruction of the storage control unit 17. The immediate value is determined to be 1. Furthermore, the save state flag 22t-
set. Thereafter, the process of saving the contents of the three registers R2, R, 9/+1 to the storage unit 13 is started.

Since the save state flag 22 is set, the data! Select the input from lA38 as its output. As a result, as environment saving processing, data is transferred from the copy register file 15 to the storage unit 13 via the data line 38f. The address of the transfer destination is indicated by the address register 18, and in the first transfer, the address ``n''''n'' of the storage section 13 of al.
The contents of the Is register 1a” are stored. At this time, l
/c Changes the bit 1'' of the evacuation 7 lag 16 corresponding to 几3 to ``0'', indicating that the evacuation of 几3 has been completed.Then, the contents of the address register 18 are incremented from 1n''. 1
n+1''. The contents of the I register ``'b'' are stored at address 1n+1'' of the storage unit 13 indicated by this address. At the same time, 几. Change the save flag 160 bits corresponding to "1" to "O".

Subsequently, the contents of the address register 18 are incremented to "n+2".
”.As a result, the storage unit 13 shown in Figure 8g2 (b)
The state of the work evacuation flag 16 is reached. In this state, when there is a write request to the F storage unit 13 from the processor unit 12 in the storage unit access request 39, the gate 24 outputs a processing prohibition signal to the processor unit 12 because the save state 7 lag 22 is set. do. As a result, when there is a storage section access request 39 from the processor section 12 during the environment saving process to the storage section 13, the processor section 12
During this period, the environment evacuation process is performed on the storage device 11.
Continue with. As a result, @C'' is stored in the storage unit 130'''n+2'' address, and a series of environment saving operations are completed.The saving state flag 22t is used to indicate that the environment saving in the storage device 11 has been completed. -Reset.

! A case in which the processor unit 12 performs write processing to the 1+x register of the register file 14 in the state shown in FIG. 2 ib) will be described below. When the processor unit 12 writes to the register file 14, it also writes to the copy register file 150RJ+x register. In this case, the content "C" of the RJ+t register will be rewritten before the saving to the storage unit 13 is completed, and the saving process will not end normally.

Therefore, in this embodiment, a save flag 16 is provided, and when the bit corresponding to the register 11+1 is 9+1'', ``1'' is outputted to the save incomplete signal 36, By inputting the input to the gate 21 of the processor section 12, all register write processing in the processor section 12 is interrupted.As a result, 1C'' is saved as the value of the register corresponding to the copy register file 150Rg+x register, and the value of 1C'' is stored in the memory section 12. ``C'' can be stored at address ``1ni2'' as the saved contents of fl R, g + Lujistar.

Although this example is shown to explain the present invention in detail, it is not intended to limit the scope of the claims of the present invention.

For example, in this embodiment, a register copy command for saving three registers is shown as an example; however, commands for saving other registers, or possibly a different number of registers, may also be provided. In particular, when saving the environment, the same register group is not always saved, but the number of registers.

Since the order is different, it is also possible to distribute multiple types of command money corresponding to these types of evacuation.

Although only register file t-1 in the processor section is shown, multiple register files and multiple registers of various types can be provided, and if these register files and registers are necessary for environment save processing, It can be provided in a storage device like a copy register file. It is not necessary to include all of the registers and register files provided in the storage device that are provided in the processor section; it is sufficient to provide registers and register files that correspond to the registers and register files necessary for saving the environment.

The bit pattern stored in the save flag 16 was generated using an immediate value that can be specified by the microprogram of the storage control unit 17, but the bit pattern table corresponding to the register copy command is biased, and the bit pattern is treated as a bit pattern with a large bit width. be able to. Furthermore, bit pattern generation and correction processing can be flexibly realized by using a table.

In this embodiment, the evacuation state flag 22 is provided, but instead of this flag, the output of this OR gate is used as an input to each of the Villatra OR1 gates of the evacuation flag 16. It can be used as an old name to indicate.

(Effects of the Invention) The present invention has the advantage of providing a register group with the same contents as the register group provided in the processor section in the storage device as described above. Since data can be written from the registers in the storage device to the storage unit without transferring data from the register group to the storage device, there is no need to transfer data to save the environment in the 10 processor unit, and the environment can be saved. After the processing, necessary instruction interpretation, arithmetic operations, etc. can be performed, and the processing performance of the processor section can be improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a ninth storage device to explain the operation of the embodiment of the present invention.
The figure above shows an example of the contents of the processor section. 11...Storage device, 12...Processor unit, 13...Storage unit, 14...Register file, 15...Copy register file , 16... Save flag, 17... Storage control unit, 18... Address register, 14...
...Processor control section, 22... □
Evacuation status flag.

Claims (1)

[Claims] A processor section that has various registers and processes data, a storage section that stores data and programs, a copy register file that holds the same contents as the various registers in the processor section, and a register of the registers in the copy register file. means for setting a corresponding save flag in each register of the copy register file that needs to be transferred to the storage unit; a storage control unit that sequentially writes the contents of the copy registers that are necessary for the storage unit into the storage unit and resets bits in the save flag corresponding to the registers of the copy register file that have been written; When writing to a register, if the save flag bit corresponding to the register in the corresponding copy register file is set, writing from the processor section to the copy register file is prohibited and the processing of the processor section is stopped. 1. A storage device, comprising: a means for stopping the register file, and a process for transferring contents of a register file to the storage device and a process in the processor unit can be executed in parallel.