JPH0546581B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a storage device, and more particularly to a storage device for efficiently storing the contents of registers held in a processor section of a computer in a storage section.

(Prior art and its problems) In non-procedural programming languages such as lisp and prolog languages, the processor section There is a save process that stores a group of registers in use in a storage device. This evacuation work is also performed when switching processes or tasks. Especially in lisps and prologues, the environment is frequently saved, which has a big impact on the processing performance of these languages.

An example of evacuating the environment is "DHDWarren (Abstract Prologue Instructions Set) Technical Note 309 Artificial Intelligence Center, SRI International 1983"
“An Abstract Prolog Instruction Set”
Technical note 309 Artificial Intelligence
Environments as described on page 3 of the Center, Center, SRI International, 1983)
and saving of choice points.

In conventional computers, the above-mentioned save operation is performed by the processor section outputting the contents of a register and the storage address to a storage device, the contents of one register are stored in the storage device, and by repeating this operation. The environment is evacuated as described above. In other words, when the processor section saves a group of registers, it simply transfers the contents of the registers to the storage device, and the main processing in the processor section, such as arithmetic operations, data manipulation, and instruction interpretation, is performed. There was a problem in that the hardware available for use was not effectively utilized and high-speed processing was not possible.

(Object of the Invention) The object of the present invention is to eliminate such conventional problems and to provide a storage device for quickly storing the contents of the registers of the processor section in the storage section of the storage device when saving the environment. It is about providing.

(Structure of the Invention) A storage device of the present invention includes a processor section that processes data, a storage section that stores data and programs, a copy register file that holds the same contents as various registers in the processor section, and a copy register file that holds the same contents as various registers in the processor section. means for setting a save flag corresponding to each register with a number of bits equal to the number of registers in the file, and a save flag corresponding to each register of the copy register file that needs to be transferred to the storage unit; a storage control unit that sequentially writes contents of the copy register file that need to be transferred to a storage device into the storage unit and resets bits in the save flag corresponding to registers of the copy register file that have been written; When the processor section writes to a register in the processor, if a save flag bit corresponding to a register in the corresponding copy register file is set, writing from the processor section to the copy register file is prohibited. and means for stopping the processing of the processor section.

(Operation/Principle of the Invention) The present invention provides a register group necessary for saving the environment among the registers held by the processor section on the storage device side, and stores the same contents as the corresponding register in the processor section. Hold. When saving the environment in the processor section, data from the register group of the storage device is stored in the storage section, not from the register group of the processor section. As a result, the present invention enables the processor section to interpret instructions and perform arithmetic processing while the environment is being saved in the storage device, thereby improving the processing performance of the entire system.

(Example) Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of the invention. In FIG. 1, one embodiment of the present invention includes a storage device 11 that can control data transfer, and a processor section 12 that processes data. The storage device 11 has a storage section 11 that stores data and programs, and the processor section 12 has a register file 14 that includes a group of registers for temporarily holding states and data during data processing. Storage device 1
1 includes a copy register file 14 that holds a group of registers used when saving the environment from the register file 14 held by the processor unit 12, and 1 bit corresponding to each register in the copy register file 15. Evacuation flag 1 prepared for each
6, a storage control unit 17 that controls data transfer processing using a microprogram, and a function to hold and advance the save area address of the storage unit 13 sent from the processor unit 12 when saving the environment to the storage unit 13. and an address register 18. The processor section 12 has a processor control section 19 that controls data processing, and a register copy command line 20 that specifies a register group to be saved and instructs the saving when saving the environment. Processor part 1
2, when writing to a register in the register file 14, if the bit of the save flag 16 corresponding to the register is set via the register address line 35, the save incomplete signal 36 is turned ON.
It has a gate 21 that inhibits processing by the processor 12 by performing AND processing with the register write signal 34. Furthermore, the storage device 11 has an evacuation state flag 22 indicating that data is to be transferred from the copy register file 15 to the storage section 13 as an environment evacuation process, and the processor section 1
2 via data line 37 or copy register file 15 or data line 38
It has a selector 23 that selects any of the data sent via the save state flag 22. The save state flag 22 indicates that when an access request 39 is received from the processor section 12 to the memory section 13 while the register contents are being saved from the copy register file 15 to the memory section 13,
The gate 24 controls the processing in the processor section 12 to be prohibited.

Data line 40 is register copy command line 20
When the storage control device 17 receives the register copy command sent in the copy register file 1
It is used to store the bit pattern corresponding to the save target register group No. 5 in the save flag 16.

FIG. 2 is a diagram for explaining the operation of the storage device and processor section in one embodiment of the present invention.
Figure 2a shows the state immediately before evacuation, Figure 2b
shows a state in the middle of saving the environment of the processor unit 12. To explain the operation of this embodiment in FIG. 2, as a process before saving the environment,
The processor section 12 performs data processing. During data processing, temporary data or status is written to the register file 14. At the same time as writing to this register file 14, the same content as that written to the register file 14 is written to the corresponding register position of the copy register file 15 of the storage device 11 indicated by the register address line 35 via the data line 31. This state is illustrated by the example of the register file 14 and copy register file 15 in FIGS. 2a and 2b. In this example, the same values a, b, and c are stored in corresponding register locations.

After completing a series of data processing, the processor unit 12 starts an operation to save the environment. In order to save the contents of three registers R _k , R _l , R _l+1 as shown in FIG. 2 in the register file 14,
The processor section 12 sends a register copy command to transfer the contents of the three registers to the storage section 13 via the register copy command line 20. The order of the registers to be saved and the address of the register to be saved in the copy register file 15 are controlled by the microprogram of the storage control unit 17. In this embodiment, the order of saving is R ₂ , R _l , and R _l+1 in FIG. 2. The storage destination address "n" for the storage section 13 is sent from the processor section 12 to the address register 18 via the address line 32, and "n" is stored in the address register 18.

After receiving the register copy command sent from the processor unit 12, the storage control unit 17 of the storage device 11 sets the register to be saved among the registers in the copy register file 15 to the save flag 16 via the data line 40. A bit pattern indicating this is stored in the save flag 16. In the example shown in FIG. 2a, "0010...011" is stored in the save flag 16.
These bit patterns differ depending on the type of copy command sent via the register copy command line 20.
It is determined by the immediate value given by microinstruction 7. Furthermore, the save state flag 22 is set. Thereafter, the process of saving the contents of the three registers R ₂ , R _l , and R _l+1 to the storage unit 13 is started. Since the save state flag 22 is in the set state, the selector 23 selects the input from the data line 38 as its output. As a result, data is transferred from the copy register file 15 to the storage unit 13 via the data line 38 as environment saving processing. The transfer destination address is indicated by the address register 18, and in the first transfer, the content "a" of the R2 register of the copy register file 15 is stored at address " _n " of the storage section 13 in FIG. 2a. At this time, the bit of the save flag 16 corresponding to _R2 is changed from "1" to "0", indicating that the save of _R2 has been completed. Next, the contents of the address register 18 are incremented from "n" to "n+1". The content "b" of the R _l register is stored at address "n+1" of the storage unit 13 indicated by this address. At the same time, the bit of the save flag 16 corresponding to _Re is changed from "1" to "0".
Subsequently, the contents of the address register 18 are incremented to "n+2". As a result, the storage unit 13 and the save flag 16 are in the state shown in FIG. 2b. In this state, when there is a write request from the processor section 12 to the memory section 13 by the memory section access request 39, the gate 24 outputs a processing prohibition signal to the processor section 12 since the save state flag 22 is in the set state. As a result, storage unit 13
When a storage access request 39 is received from the processor section 12 during the environment saving process, the processing of the processor section 12 is interrupted, and during this time the environment saving process is continued in the storage device 11. As a result, storage unit 13
When "C" is stored at address "n+2" of , the series of environment saving operations ends. Storage device 11
The save state flag 22 is reset to indicate that the environment save has been completed.

A case in which the processor unit 12 performs write processing to the R _l+1 register of the register file 14 in the state shown in FIG. 2b will be described below. At the same time as the processor section 12 writes to the register file 14, it also writes to the R _l+1 register of the copy register file 15. In this case, the content "C" of the R _l+1 register will be rewritten before the saving to the storage unit 13 is completed, and the saving process will not end normally.

Therefore, in this embodiment, the evacuation flag 1
6, and when the bit corresponding to the register R _l+1 is "1", "1" is output to the save incomplete signal 36, and the gate 21 of the processor section 12 is output.
The register write process in the processor section 12 is interrupted by inputting the . As a result, “C” is saved as the value of the register corresponding to the R _l+1 register of the copy register file 15, and the storage unit 1
“C” can be stored at address “n+2” of No. 2 as the saved contents of the R _l+1 register.

Although this embodiment is shown to explain the principle of the present invention, it is not intended to limit the scope of the claims of the present invention. For example, in this embodiment, a register copy command for saving three registers is shown as an example, but a command for saving different registers or a different number of registers may also be provided. In particular, when saving the environment, the same register group is not always saved;
Since the order is different, it is also possible to provide multiple types of commands corresponding to these save types.

Also, the register file in the processor section is 1
Although only the above items are shown, multiple register files and multiple registers of various types can be provided, and if these register files and registers are necessary for environment save processing, they can be provided in the storage device in the same way as the copy register file. can. It is not necessary to provide all the registers and register files provided in the storage device that are provided in the processor section, and it is sufficient to provide registers and register files in response to the registers and register files necessary for saving the environment.

The bit pattern stored in the save flag 16 was generated using an immediate value that can be specified by the microprogram of the storage control unit 17, but by providing a bit pattern table that corresponds to the register copy command, it is possible to handle bit patterns with a large bit width. . Furthermore, bit pattern generation and correction processing can be realized more flexibly by using a table.

In this embodiment, the evacuation state flag 22 is provided, but
Instead of this flag, set each bit of save flag 16 to
By inputting the OR gate, the output of the OR gate can be used as a signal indicating whether or not the environment evacuation process is in progress.

(Effects of the Invention) As explained above, the present invention provides a register group with the same contents as the register group provided in the processor section in the storage device. Since data can be written from the register in the storage device to the storage section without transferring data from the group to the storage device, there is no need for the processor section to transfer data to save the environment. It is possible to perform processing such as interpretation of instructions and calculations, thereby improving the processing performance of the processor section.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a diagram showing an example of the contents of a storage device and a processor section for explaining the operation of an embodiment of the present invention. 11...Storage device, 12...Processor unit, 1
3...Storage unit, 14...Register file, 15
...Copy register file, 16... Save flag, 17... Storage control unit, 18... Address register, 14... Processor control unit, 22... Save state flag.

Claims (1)

[Claims] 1. A processor section that has various registers and processes data, a storage section that stores data and programs, a copy register file that holds the same contents as the various registers in the processor section, and registers in the copy register file. A save flag is provided corresponding to each register with a number of bits equal to the number of bits, and a save flag is provided for each register in the copy register file that needs to be transferred to the storage unit.
means for setting corresponding save flags; and means for sequentially writing the contents of the copy register files that need to be transferred to the storage device into the storage unit, and setting the contents of the save flags corresponding to the registers of the copy register file that have been written. a memory control section that resets the bit of the processor; and when the processor section writes to a register in the processor,
means for inhibiting writing from the processor section to the copy register file and stopping the processing of the processor section when a bit of a save flag corresponding to a register in the corresponding copy register file is set; A storage device characterized in that processing for transferring the contents of the storage device to the storage device and processing in the processor section can be executed in parallel.