JPS6226730B2 - - Google Patents

Info

Publication number
JPS6226730B2
JPS6226730B2 JP57231890A JP23189082A JPS6226730B2 JP S6226730 B2 JPS6226730 B2 JP S6226730B2 JP 57231890 A JP57231890 A JP 57231890A JP 23189082 A JP23189082 A JP 23189082A JP S6226730 B2 JPS6226730 B2 JP S6226730B2
Authority
JP
Japan
Prior art keywords
register
instruction
operand
data
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57231890A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59123937A (ja
Inventor
Satoshi Sugiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57231890A priority Critical patent/JPS59123937A/ja
Publication of JPS59123937A publication Critical patent/JPS59123937A/ja
Publication of JPS6226730B2 publication Critical patent/JPS6226730B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP57231890A 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式 Granted JPS59123937A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57231890A JPS59123937A (ja) 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57231890A JPS59123937A (ja) 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式

Publications (2)

Publication Number Publication Date
JPS59123937A JPS59123937A (ja) 1984-07-17
JPS6226730B2 true JPS6226730B2 (enrdf_load_stackoverflow) 1987-06-10

Family

ID=16930631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57231890A Granted JPS59123937A (ja) 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式

Country Status (1)

Country Link
JP (1) JPS59123937A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6188332A (ja) * 1984-10-06 1986-05-06 Nec Corp ２進演算回路
JPS6237737A (ja) * 1985-08-12 1987-02-18 Matsushita Electric Ind Co Ltd マイクロプロセツサ回路
JP3445535B2 (ja) * 1999-09-24 2003-09-08 株式会社東芝 バイパス制御回路
JP3948615B2 (ja) 2002-07-05 2007-07-25 富士通株式会社 プロセッサ及び命令制御方法

Also Published As

Publication number Publication date
JPS59123937A (ja) 1984-07-17

Similar Documents

Publication Publication Date Title
US4780819A (en) Emulator system utilizing a program counter and a latch coupled to an emulator memory for reducing fletch line of instructions stored in the emulator memory
US4642757A (en) Microinstruction controlled arithmetic control unit
JPS623461B2 (enrdf_load_stackoverflow)
JPS6226730B2 (enrdf_load_stackoverflow)
KR890015119A (ko) 데이타 처리기
JP2883488B2 (ja) 命令処理装置
JPH05173778A (ja) データ処理装置
JPS5960551A (ja) メモリアクセス制御装置
JPH0736166B2 (ja) データ転送方式
KR19980034448A (ko) 마이크로프로세서의 1 사이클 스택 오퍼레이션 라이트 회로
JP3068406B2 (ja) ベクトル演算装置
JPS60176144A (ja) レジスタフアイル装置
JPS61161560A (ja) メモリ装置
JPH023822A (ja) データ処理装置
JPH0228724A (ja) 分岐命令制御方式
JPS63293665A (ja) デ−タ処理装置
JPS6014335A (ja) 情報処理装置
JPS59205645A (ja) 情報転送装置
JPS63174173A (ja) 情報処理装置
JPH0241522A (ja) 関数演算処理装置
JPS6333175B2 (enrdf_load_stackoverflow)
JP2001100991A (ja) ディジタル信号処理装置
JPH0426494B2 (enrdf_load_stackoverflow)
JPH0312734A (ja) データ処理装置の制御方式
KR19990066458A (ko) 데이터 처리기