JPS59123937A - 演算装置におけるバイパス制御方式 - Google Patents

演算装置におけるバイパス制御方式

Info

Publication number
JPS59123937A
JPS59123937A JP57231890A JP23189082A JPS59123937A JP S59123937 A JPS59123937 A JP S59123937A JP 57231890 A JP57231890 A JP 57231890A JP 23189082 A JP23189082 A JP 23189082A JP S59123937 A JPS59123937 A JP S59123937A
Authority
JP
Japan
Prior art keywords
register
instruction
operand
data
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57231890A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6226730B2 (enrdf_load_stackoverflow
Inventor
Satoshi Sugiura
聡 杉浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57231890A priority Critical patent/JPS59123937A/ja
Publication of JPS59123937A publication Critical patent/JPS59123937A/ja
Publication of JPS6226730B2 publication Critical patent/JPS6226730B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824Operand accessing
    • G06F9/3826Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP57231890A 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式 Granted JPS59123937A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57231890A JPS59123937A (ja) 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57231890A JPS59123937A (ja) 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式

Publications (2)

Publication Number Publication Date
JPS59123937A true JPS59123937A (ja) 1984-07-17
JPS6226730B2 JPS6226730B2 (enrdf_load_stackoverflow) 1987-06-10

Family

ID=16930631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57231890A Granted JPS59123937A (ja) 1982-12-29 1982-12-29 演算装置におけるバイパス制御方式

Country Status (1)

Country Link
JP (1) JPS59123937A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6188332A (ja) * 1984-10-06 1986-05-06 Nec Corp 2進演算回路
JPS6237737A (ja) * 1985-08-12 1987-02-18 Matsushita Electric Ind Co Ltd マイクロプロセツサ回路
US6772318B1 (en) * 1999-09-24 2004-08-03 Kabushiki Kaisha Toshiba Bypass control circuit
US7287150B2 (en) 2002-07-05 2007-10-23 Fujitsu Limited Processor and instruction control method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6188332A (ja) * 1984-10-06 1986-05-06 Nec Corp 2進演算回路
JPS6237737A (ja) * 1985-08-12 1987-02-18 Matsushita Electric Ind Co Ltd マイクロプロセツサ回路
US6772318B1 (en) * 1999-09-24 2004-08-03 Kabushiki Kaisha Toshiba Bypass control circuit
US7287150B2 (en) 2002-07-05 2007-10-23 Fujitsu Limited Processor and instruction control method

Also Published As

Publication number Publication date
JPS6226730B2 (enrdf_load_stackoverflow) 1987-06-10

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