JPS6223342B2 - - Google Patents

Info

Publication number
JPS6223342B2
JPS6223342B2 JP56202842A JP20284281A JPS6223342B2 JP S6223342 B2 JPS6223342 B2 JP S6223342B2 JP 56202842 A JP56202842 A JP 56202842A JP 20284281 A JP20284281 A JP 20284281A JP S6223342 B2 JPS6223342 B2 JP S6223342B2
Authority
JP
Japan
Prior art keywords
bus
peripheral
commands
unit
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56202842A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58105321A (ja
Inventor
Ichiro Shirasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP20284281A priority Critical patent/JPS58105321A/ja
Publication of JPS58105321A publication Critical patent/JPS58105321A/ja
Publication of JPS6223342B2 publication Critical patent/JPS6223342B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP20284281A 1981-12-16 1981-12-16 周辺制御装置 Granted JPS58105321A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20284281A JPS58105321A (ja) 1981-12-16 1981-12-16 周辺制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20284281A JPS58105321A (ja) 1981-12-16 1981-12-16 周辺制御装置

Publications (2)

Publication Number Publication Date
JPS58105321A JPS58105321A (ja) 1983-06-23
JPS6223342B2 true JPS6223342B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-05-22

Family

ID=16464089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20284281A Granted JPS58105321A (ja) 1981-12-16 1981-12-16 周辺制御装置

Country Status (1)

Country Link
JP (1) JPS58105321A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54531A (en) * 1977-06-03 1979-01-05 Hitachi Ltd Channel control system
JPS598845B2 (ja) * 1978-11-21 1984-02-28 株式会社東芝 チヤンネル制御方式
JPS599928B2 (ja) * 1978-11-21 1984-03-06 株式会社東芝 チヤネル制御方式

Also Published As

Publication number Publication date
JPS58105321A (ja) 1983-06-23

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