JPS62219557A - 半導体集積回路の製造方法 - Google Patents

半導体集積回路の製造方法

Info

Publication number
JPS62219557A
JPS62219557A JP61062454A JP6245486A JPS62219557A JP S62219557 A JPS62219557 A JP S62219557A JP 61062454 A JP61062454 A JP 61062454A JP 6245486 A JP6245486 A JP 6245486A JP S62219557 A JPS62219557 A JP S62219557A
Authority
JP
Japan
Prior art keywords
region
layer
epitaxial layer
pnp transistor
iil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61062454A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0577300B2 (enrdf_load_stackoverflow
Inventor
Teruo Tabata
田端　輝夫
Toshiyuki Okoda
敏幸 大古田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP61062454A priority Critical patent/JPS62219557A/ja
Publication of JPS62219557A publication Critical patent/JPS62219557A/ja
Publication of JPH0577300B2 publication Critical patent/JPH0577300B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/658—Integrated injection logic integrated in combination with analog structures

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP61062454A 1986-03-19 1986-03-19 半導体集積回路の製造方法 Granted JPS62219557A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61062454A JPS62219557A (ja) 1986-03-19 1986-03-19 半導体集積回路の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61062454A JPS62219557A (ja) 1986-03-19 1986-03-19 半導体集積回路の製造方法

Publications (2)

Publication Number Publication Date
JPS62219557A true JPS62219557A (ja) 1987-09-26
JPH0577300B2 JPH0577300B2 (enrdf_load_stackoverflow) 1993-10-26

Family

ID=13200664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61062454A Granted JPS62219557A (ja) 1986-03-19 1986-03-19 半導体集積回路の製造方法

Country Status (1)

Country Link
JP (1) JPS62219557A (enrdf_load_stackoverflow)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5350686A (en) * 1976-10-19 1978-05-09 Mitsubishi Electric Corp Production of semiconductor integrated circuit
JPS5384578A (en) * 1976-12-29 1978-07-26 Fujitsu Ltd Semiconductor integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5350686A (en) * 1976-10-19 1978-05-09 Mitsubishi Electric Corp Production of semiconductor integrated circuit
JPS5384578A (en) * 1976-12-29 1978-07-26 Fujitsu Ltd Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPH0577300B2 (enrdf_load_stackoverflow) 1993-10-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term