JPS62219556A - 半導体集積回路の製造方法 - Google Patents

半導体集積回路の製造方法

Info

Publication number
JPS62219556A
JPS62219556A JP61062452A JP6245286A JPS62219556A JP S62219556 A JPS62219556 A JP S62219556A JP 61062452 A JP61062452 A JP 61062452A JP 6245286 A JP6245286 A JP 6245286A JP S62219556 A JPS62219556 A JP S62219556A
Authority
JP
Japan
Prior art keywords
diffusion layer
region
epitaxial layer
diffused layers
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61062452A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0577299B2 (enrdf_load_stackoverflow
Inventor
Teruo Tabata
田端　輝夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP61062452A priority Critical patent/JPS62219556A/ja
Publication of JPS62219556A publication Critical patent/JPS62219556A/ja
Publication of JPH0577299B2 publication Critical patent/JPH0577299B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/658—Integrated injection logic integrated in combination with analog structures

Landscapes

  • Bipolar Integrated Circuits (AREA)
JP61062452A 1986-03-19 1986-03-19 半導体集積回路の製造方法 Granted JPS62219556A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61062452A JPS62219556A (ja) 1986-03-19 1986-03-19 半導体集積回路の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61062452A JPS62219556A (ja) 1986-03-19 1986-03-19 半導体集積回路の製造方法

Publications (2)

Publication Number Publication Date
JPS62219556A true JPS62219556A (ja) 1987-09-26
JPH0577299B2 JPH0577299B2 (enrdf_load_stackoverflow) 1993-10-26

Family

ID=13200610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61062452A Granted JPS62219556A (ja) 1986-03-19 1986-03-19 半導体集積回路の製造方法

Country Status (1)

Country Link
JP (1) JPS62219556A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0577299B2 (enrdf_load_stackoverflow) 1993-10-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term