JPS62217498A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JPS62217498A
JPS62217498A JP61047343A JP4734386A JPS62217498A JP S62217498 A JPS62217498 A JP S62217498A JP 61047343 A JP61047343 A JP 61047343A JP 4734386 A JP4734386 A JP 4734386A JP S62217498 A JPS62217498 A JP S62217498A
Authority
JP
Japan
Prior art keywords
memory cell
column
memory
information
redundant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61047343A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0542079B2 (enrdf_load_stackoverflow
Inventor
Shoichiro Kawashima
将一郎 川嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61047343A priority Critical patent/JPS62217498A/ja
Publication of JPS62217498A publication Critical patent/JPS62217498A/ja
Publication of JPH0542079B2 publication Critical patent/JPH0542079B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP61047343A 1986-03-06 1986-03-06 半導体記憶装置 Granted JPS62217498A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61047343A JPS62217498A (ja) 1986-03-06 1986-03-06 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61047343A JPS62217498A (ja) 1986-03-06 1986-03-06 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS62217498A true JPS62217498A (ja) 1987-09-24
JPH0542079B2 JPH0542079B2 (enrdf_load_stackoverflow) 1993-06-25

Family

ID=12772520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61047343A Granted JPS62217498A (ja) 1986-03-06 1986-03-06 半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS62217498A (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177088A (ja) * 1988-12-27 1990-07-10 Nec Corp リダンダンシー回路
JPH0554695A (ja) * 1991-08-20 1993-03-05 Nec Ic Microcomput Syst Ltd 半導体記憶装置
US5392247A (en) * 1991-09-19 1995-02-21 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device including redundancy circuit
US5416740A (en) * 1991-12-12 1995-05-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device including redundant memory cell array for repairing defect
US5446692A (en) * 1992-02-14 1995-08-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having redundancy memory cells shared among memory blocks
JPH08153399A (ja) * 1994-11-29 1996-06-11 Nec Corp 半導体記憶装置
JP2006019016A (ja) * 1995-05-12 2006-01-19 Renesas Technology Corp 半導体記憶装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6208569B1 (en) * 1999-04-06 2001-03-27 Genesis Semiconductor, Inc. Method of and apparatus for sharing redundancy circuits between memory arrays within a semiconductor memory device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5792500A (en) * 1980-10-06 1982-06-09 Inmos Corp Randam-access-memory having redundancy
JPS60130139A (ja) * 1983-12-16 1985-07-11 Fujitsu Ltd 半導体記憶装置
JPS6150294A (ja) * 1984-08-18 1986-03-12 Mitsubishi Electric Corp 半導体記憶装置の冗長回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5792500A (en) * 1980-10-06 1982-06-09 Inmos Corp Randam-access-memory having redundancy
JPS60130139A (ja) * 1983-12-16 1985-07-11 Fujitsu Ltd 半導体記憶装置
JPS6150294A (ja) * 1984-08-18 1986-03-12 Mitsubishi Electric Corp 半導体記憶装置の冗長回路

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177088A (ja) * 1988-12-27 1990-07-10 Nec Corp リダンダンシー回路
JPH0554695A (ja) * 1991-08-20 1993-03-05 Nec Ic Microcomput Syst Ltd 半導体記憶装置
US5392247A (en) * 1991-09-19 1995-02-21 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device including redundancy circuit
US5416740A (en) * 1991-12-12 1995-05-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device including redundant memory cell array for repairing defect
US5446692A (en) * 1992-02-14 1995-08-29 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having redundancy memory cells shared among memory blocks
JPH08153399A (ja) * 1994-11-29 1996-06-11 Nec Corp 半導体記憶装置
JP2006019016A (ja) * 1995-05-12 2006-01-19 Renesas Technology Corp 半導体記憶装置

Also Published As

Publication number Publication date
JPH0542079B2 (enrdf_load_stackoverflow) 1993-06-25

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees