JPS62162874U - - Google Patents
Info
- Publication number
- JPS62162874U JPS62162874U JP5133286U JP5133286U JPS62162874U JP S62162874 U JPS62162874 U JP S62162874U JP 5133286 U JP5133286 U JP 5133286U JP 5133286 U JP5133286 U JP 5133286U JP S62162874 U JPS62162874 U JP S62162874U
- Authority
- JP
- Japan
- Prior art keywords
- soldering
- printed circuit
- circuit board
- insertion holes
- lead terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005476 soldering Methods 0.000 claims description 7
- 230000037431 insertion Effects 0.000 claims 2
- 238000003780 insertion Methods 0.000 claims 2
- 229910003460 diamond Inorganic materials 0.000 claims 1
- 239000010432 diamond Substances 0.000 claims 1
- 239000003973 paint Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図はこの考案のプリント基板の一実施例の
構成説明図、第２図は半田付領域間の間隔にイン
クを印刷したときの第１図相当図、第３図はこの
考案のプリント基板に半田付けを行つた状態の断
面図、第４図は従来例の第１図相当図である。
１……ソルダレジスト、２……半田付領域、３
……間隔、４……くびれ部、９……銅箔製ランド
。
Figure 1 is an explanatory diagram of the configuration of an embodiment of the printed circuit board of this invention, Figure 2 is a diagram equivalent to Figure 1 when ink is printed in the spaces between soldering areas, and Figure 3 is the printed circuit board of this invention. FIG. 4 is a cross-sectional view of the state in which soldering is performed, and FIG. 4 is a view corresponding to FIG. 1 of the conventional example. 1... Solder resist, 2... Soldering area, 3
... Spacing, 4... Constriction, 9... Copper foil land.
Claims (1)
を設定する多数の挿入孔を有しかつこれら各挿入
孔を中心として上記各リード端子を半田付するた
めの半田付領域が絶縁性レジスト膜により設定さ
れたプリント基板であつて、 この半田付領域が略ひし形に設定されたことを
特徴とするプリント基板。 ２ 隣接する半田付領域間の絶縁性レジスト膜上
にさらに絶縁性塗料膜が塗布されていることを特
徴とする実用新案登録請求の範囲第１項記載のプ
リント基板。[Claims for Utility Model Registration] 1. Soldering that has a number of insertion holes for setting an electronic component having a number of lead terminals on a board, and for soldering each of the lead terminals around each of these insertion holes. What is claimed is: 1. A printed circuit board having an area defined by an insulating resist film, wherein the soldering area is set in a substantially diamond shape. 2. The printed circuit board according to claim 1, further comprising an insulating paint film coated on the insulating resist film between adjacent soldering areas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5133286U JPS62162874U (en) | 1986-04-04 | 1986-04-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5133286U JPS62162874U (en) | 1986-04-04 | 1986-04-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62162874U true JPS62162874U (en) | 1987-10-16 |
Family
ID=30875491
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5133286U Pending JPS62162874U (en) | 1986-04-04 | 1986-04-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62162874U (en) |
-
1986
- 1986-04-04 JP JP5133286U patent/JPS62162874U/ja active Pending
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